Motorola 68060 FPGA replacement module (idea)

[Iggy]

What about AMD's Geode line of x86 SoC's?

http://en.wikipedia.org/wiki/Geode_(processor)

The Geode LX in particular would be perfect imo!

http://en.wikipedia.org/wiki/Geode_(processor)#Geode_LX

There are more powerful processor (including processors with more then one core which could aid in hardware emulation), but the XP-M based versions of the Geode aren't bad and might be powerful enough.

[djos]

There are more powerful processor (including processors with more then one core which could aid in hardware emulation), but the XP-M based versions of the Geode aren't bad and might be powerful enough.

If it's just a companion to an FPGA and providing FPU support it should be grunty enuf - could always use the Athlon based version NX Series if they fit into the required power envelope?

[mongo]

sounds even better perhaps, a x86 cpu module for fpgaarcade?? there would be no doubt about interface, and the original amigas might stay what they are, which is what im fine with.

Better to just do a FPGA on a PCI card and put it in a PC.

[Iggy]

If it's just a companion to an FPGA and providing FPU support it should be grunty enuf - could always use the Athlon based version NX Series if they fit into the required power envelope?

AMD has so new really low power processors (I get newsletter e-mails from the embedded system division).
I'll try to post some of the new stuff.

Probably too powerful (and they are APUs that contain an on die GPU).

AMD Embedded G-Series Platform
AMD Embedded R-Series Platform

http://wwwd.amd.com/catalog/salescat.nsf/shop?openform

This part may help:
Fusion Controller Hub (eliminates separate north and southbridges).
Add a low power Athlon or Turion and and FPGA for glue logic.


























9

[freqmax]

Can the Geode be directly interfaced via level converters to the 68060 socket?
(it seems the only one self contained so far that it won't cause a serious circuit mess)

Perhaps using part of the memory space as Amiga motherboard space but with some serious "wait states" ..?

It would then work such that some areas would run att full speed (1 GHz?) and others be limited (200 MHz?). It must be possible to mark some areas as "dirty" whenever other custom chips work on them.

[billt]

Can the Geode be directly interfaced via level converters to the 68060 socket?
(it seems the only one self contained so far that it won't cause a serious circuit mess)

Geode does not have a 68060 bus in its pinout, so no.

I saw a PCI bus for Geode, do an FPGA PCI to 68060 bridge. If Geode's PCI bus is 5V, then you'll need level shifters between FPGA and Geode as well as perhaps between FPGA and 680x0 socket.

[Iggy]

Geode does not have a 68060 bus in its pinout, so no.

I saw a PCI bus for Geode, do an FPGA PCI to 68060 bridge. If Geode's PCI bus is 5V, then you'll need level shifters between FPGA and Geode as well as perhaps between FPGA and 680x0 socket.

I'd rather uses an FPGA for bus translation.
Going trough the PCI bus would be seriously low.

[billt]

I'd rather uses an FPGA for bus translation.
Going trough the PCI bus would be seriously low.

What I mentioned did use the FPGA for bus translation, PCI bus to 680x0 bus. That's what a bridge does. (Sometimes bridges sit between two of the same bus as well, as in PCI to PCI bridge which helps give more slots total than a single bus can provide)

As someone mentioned the Geode LX, have a look at the datasheet
http://wiki.laptop.org/images/a/a1/Lx_databook.pdf

Page 21 has a diagram showing the pin groupings, basically a schematic symbol. If not PCI, what else would you connect to?

I see that the PCI bus in it is 3.3V signalling, so good there.

[Iggy]

What I mentioned did use the FPGA for bus translation, PCI bus to 680x0 bus. That's what a bridge does. (Sometimes bridges sit between two of the same bus as well, as in PCI to PCI bridge which helps give more slots total than a single bus can provide)

As someone mentioned the Geode LX, have a look at the datasheet
http://wiki.laptop.org/images/a/a1/Lx_databook.pdf

Page 21 has a diagram showing the pin groupings, basically a schematic symbol. If not PCI, what else would you connect to?

I see that the PCI bus in it is 3.3V signalling, so good there.

I know, but the bandwidth of these bridge devices slows done the whole design.
Compare the bandwidth

[freqmax]

Seems http://www.majsta.com/ has come slightly further:

after 2 hours here it is. MC68010 in FPGA so now I m convinced, are you ?

On 4th januari it has trouble booting. On 9th januari the FPGA seems to emulate 68010.

[psxphill]

Seems http://www.majsta.com/ has come slightly further:
 
 
On 4th januari it has trouble booting. On 9th januari the FPGA seems to emulate 68010.

I think his biggest achievement is he did his own hardware first. Hooking up a development board to your Amiga and then downloading someone elses cpu core is likely to hit a plateau when you see it work. "Damn now I got to start from scratch and build my own hardware". Ok that board is not ready to be mass produced, but it can be tidied up pretty easy.
 
So yeah, awesome work.. Pity it's for a600 and I don't have one. Can someone give him an A1200 ?

[wawrzon]

so all you need is decelerator board? lets focus on something else.

[billt]

so all you need is decelerator board? lets focus on something else.

Every project has to start somewhere. for someone not having an engineering background, i'm happy to see his thing booting at all, even if it's been done by others before cabling to their fpga boards. i don't understand the slowness, perhaps something odd in his bus logic to the outside of the fpga.  we can all reinvent the wheel and perhaps beat him in speed, but he's the first to get what is intended to be a classic accelerator product (not a minimig inside a 3rd party dev board or just an experiment toward the minimig goal) running that i know of, which was exactly the original topic of this thread before shifting to x86 and software emulation. imagine, if a no-nothing got an fpga to do this, then he'll likely get it doing better than this as well, given time.

if i had the time, i'd be reinventing that wheel with a Xilinx Zync chip. should be good for 68k softcore and includes an easy path to arm without additional hardware. not x86, but gives both sides of this thread something, softcore for the likes of me, and fast cpu running software for Jim and friends. and arm can be big-endian, so might save some conversion to improve emulation speed compared to x86. faster than most Geode as well! in 2012 I studied fpga design and computer architechture for master's degree. (been verilog verification engineer and soc integrator for 6 years, silicon layout monkey before than laying out fpga silicon for 8 years) currently going through videos from a more advanced architecture course. fun stuff! But not my main project when i have time for anything at all.

[wawrzon]

i'm happy to see his thing booting at all

me too!

 i don't understand the slowness
 

it must be the bus. has been advised not to take one cycle without going into detail. seems its hard to get honest help. ofr it might be signals on the self made board..

anyway i like his stuborness, as said.

[JimDrew]

Endian is not an issue.  You can swap with the FPGA.  

My 68040 core handles everything without needing the endian reversed, but I am sure it would be significantly faster without having to do that.

The only thing I don't do in my code is instruction cycle counting.  That could be done, but I never bothered.  The FPGA could be used to trigger an event to denote the end of the instruction cycle (where a process loop just waited for this to occur).  So, based on the speed of your x86 CPU, you could reliably have cycle exact timing at a speed limited to by your fastest instruction (nop).  I know my Mac emulation has no JIT type of stuff, is 100% assembly, and is frightenly fast on modern PC hardware.  I will have to test it on my Sandy Bridge setup to see how fast of a 040 Mac it is.  

[Hattig]

The fact that he has got a 68k core running on an FPGA connected into a standard 68k socket and being seen as a standard 68k processor by the system is a great achievement.

As he says, the core can be clocked faster, and it's likely there are a few tweaks to get the per-clock speed up as well. First steps first.