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Offline JimS

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Re: FPGA for dummies
« Reply #44 on: December 06, 2011, 04:51:25 PM »
Quote from: bloodline;670502
I find this philosophical argument about Emulation vs Real hardware equity funny.

Either via a software emulator or an FPGA, there is a recreation of the original functionality of the old chips. Neither is more "real" than the other and both "emulate" (meaning: appear to be like the original hardware from a user and software perspective) the Amiga.


I've thought that this emulation vs "real" argument amusing at times as well. I'm more concerned about semantics here. There is a difference between the two, from the technical viewpoint. That has nothing to do with which is "better" or which is a "real Amiga".
Quote

For those unsure about FPGA chips, think of them as thousands of little 74xx chips in one package that can be connected anyway desired by software.

An FPGA allows a hardware designer to build his circuits in a single chip, rather than use lots of separate components all soldered together on a circuit board :)


I visualize the original Lorraine wire wrapped prototype here. ;-)
Obsolescence is futile. You will be emulated. - Amigus of Borg
 

Offline shoggoth

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Re: FPGA for dummies
« Reply #45 on: December 06, 2011, 05:02:04 PM »
It should be noted that VHDL and Verilog are languages which are technology-independent, and are used to implement logic on a wide range of hardware, including ASICS (which by the definitions in this threads are "not emulations" of the "real" thing - because they're hardwared).

Quote from: psxphill
FPGA appears to be pretty similar to writing a computer program.

http://en.wikipedia.org/wiki/Verilog
http://en.wikipedia.org/wiki/VHDL


The VHDL language is used to describe the logic function of a circuit; it's not a sequencial program which emulates that circuit. The result is synthesized for the target technology - ASIC, FPGA, CPLD, PLD etc. If you're crazy enough you can even print a schematic of result of the synthesis and implement it yourself using 74-circuit.

This raises a question: If I do this. I design a circuit using the VHDL language, and implement the result of the synthesis using 74-circuits. Would this still be an emulation?

Quote from: psxphill
The major difference between an FPGA and a software emulator is you don't have to work round operating system limitations on an FPGA. However the FPGA is still an emulator.


FPGAs are inherently parallel and perform logic functions just like a (huge) bunch of 74-circuits would. A software emulator is inherently sequencial since it's executed by a CPU. FPGAs don't execute anything. You could have a software emulator running on a system without an operating system. This would still be extremely different from a hardware implementation on an FPGA.

All this is (very) clear to people who work with this stuff, or who has at *least* taken some rudimentary courses on this subject. There are good books about this too.

Quote from: Thorham;670500
An FPGA emulates a circuit, because while the components are fixed, it's wiring is not, and therefore the circuit isn't fixed. It imitates a circuit's function by providing user definable wiring. Wires are part of a circuit, and these aren't fixed here.


By this definition, all programmable logic are emulations of "real" circuits.

There are many types of programmable logic circuits, all of which the function is described using the VHDL (or Verilog) language. Just because FPGAs use lookup tables similar to SRAMs instead of fuses or some reprogrammable incarnation of the same thing, doesn't mean it's an emulation of that circuit.
 

Offline shoggoth

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Re: FPGA for dummies
« Reply #46 on: December 06, 2011, 05:06:08 PM »
Quote from: persia;670474
But if you tell the FPGA to create a gate, how does it do that?  What is the FPGAs actual method of creating a gate inside itself?  How does it remember that gate? What is actually going on at the physical level?  Surely there aren't a lot of nano-bots building and tearing down hardware inside the FPGA.


This is fundamental switching theory; the FPGA uses lookup tables for combinatorial logic and logic for interconnects, MUXes etc. These lookup tables are similar to SRAMs, and this is why FPGA contents is volatile.
 

Offline Thorham

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Re: FPGA for dummies
« Reply #47 on: December 06, 2011, 05:29:13 PM »
Quote from: shoggoth;670513
Just because FPGAs use lookup tables similar to SRAMs instead of fuses or some reprogrammable incarnation of the same thing, doesn't mean it's an emulation of that circuit.


Quote from: shoggoth;670514
This is fundamental switching theory; the FPGA uses lookup tables for combinatorial logic and logic for interconnects, MUXes etc. These lookup tables are similar to SRAMs, and this is why FPGA contents is volatile.
And there we have it: Lookup tables. This means there's no physical chip, which means it's an emulation (imitation). Or perhaps it's about the meaning of the word 'emulation' being interpreted in different ways.
« Last Edit: December 06, 2011, 05:31:30 PM by Thorham »
 

Offline shoggoth

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Re: FPGA for dummies
« Reply #48 on: December 06, 2011, 05:42:44 PM »
Quote from: Thorham;670520
And there we have it: Lookup tables. This means there's no physical chip, which means it's an emulation (imitation). Or perhaps it's about the meaning of the word 'emulation' being interpreted in different ways.

No, this is again fundamental switching theory. Lookup tables is a common way to describe a combinatorial logic function, it's not unique for FPGAs at all. The only difference in that case is that the tables are volatile in the case of the FPGA, and that their state has to be defined after power up. But apart from that, LUTs are used in all programmable logic circuits afaik, and I wouldn't be surprised if a considerable part of any ASIC design also ends up being synthesized into some kind of lookup table.

EDIT: Of course it's not an emulation of a "real" chip. It's a medium for programmable logic, nothing else. The same code can be put into an ASIC as well, giving the exact same function and timing.
« Last Edit: December 06, 2011, 05:45:04 PM by shoggoth »
 

Offline psxphill

Re: FPGA for dummies
« Reply #49 on: December 06, 2011, 05:57:39 PM »
Quote from: shoggoth;670513
(which by the definitions in this threads are "not emulations" of the "real" thing - because they're hardwared).

Just because it's hardwired is irrelevant. Using a cpu with an emulator stored in rom is also hardwired.
 
An FPGA just removes a layer of abstraction, otherwise it's largely the same.
 
Yes an FPGA is hugely parallel, but you can get hugely parallel processors (think GPGPU).
 
I don't mind using software or hardware (i.e. FPGA) for emulation, both have their uses.
 
But to say that emulation is bad and FPGA is good is missing the point that it is itself an emulation.
 
Even if you cloned the gates 100% using an FPGA it would still be an emulation (because the original didn't run on an FPGA).
« Last Edit: December 06, 2011, 06:01:01 PM by psxphill »
 

Offline shoggoth

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Re: FPGA for dummies
« Reply #50 on: December 06, 2011, 06:17:18 PM »
Quote from: psxphill;670522
An FPGA just removes a layer of abstraction, otherwise it's largely the same.


This is so untrue I don't know where to begin. FPGAs are the equivalent of a huge number of 74 logic gates. It's a programmable device, but so is a CPLD, or even a flash memory (which can be used as a programmable logic chip, btw). An FPGA is not even similar to a CPU.
 
Yes an FPGA is hugely parallel, but you can get hugely parallel processors (think GPGPU).[/quote]

There are multi-core CPUs, but each of these cores are inherently sequential and execute code. FPGAs does not execute code. They're merely a representation of a bunch of logic gates and flipflops, which can be *made* to execute code by implementing a softcore CPU.

Argumentation based on "I heard that" and random links to wikipedia without sound background knowledge makes it really difficult to discuss things. I understand that you'd like to make a point, and there is nothing wrong with that. But with claims like "FPGAs are essentially CPUs" just because they can be programmed to perform a function is... awkward. No offense.
 

Offline ShapeShifter

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Re: FPGA for dummies
« Reply #51 on: December 06, 2011, 06:45:01 PM »
Quote from: psxphill;670522
Even if you cloned the gates 100% using an FPGA it would still be an emulation (because the original didn't run on an FPGA).
So for something to be 'real' and not emulated, it must be hardwired in a permanent form onto a silicon chip? If that's the criteria we're to use, then what does that make the original Amiga 1000? After all, the ROM for the A1000 had to be soft-loaded from floppy disk - it didn't exist in a permanent chip form!

Does this mean the original Amiga 1000 wasn't a fully-real Amiga? Or are future Amigas the emulated ones, because they didn't copy the exact method used on the original Amiga and were using a different, hardware approach?

If the FPGA Replay is 'emulating' an Amiga simply because it uses a different approach to configure the chips, then so is the Amiga 1000, or anyone else who soft-kicks a Kickstart on their Amiga for whatever reason (e.g. to upgrade/downgrade their machine without replacing the physical ROMs.)

My point here is there's more than one way to achieve the same result.  If you can recreate 100% the operation of the original Amiga chips, in hardware, and without any need for real-time translation, then that qualifies as a clone system, in my view.  Software emulation is something very different, and involves real-time translation from one system architecture to another.

I must admit, though, this entire topic seems to be devolving into a debate over semantics.  I think we all know where each other is coming from, and that most of this discussion seems to hinge on how each individual poster interprets the meaning of the word 'emulation'.  We're debating different meanings of the same term, whilst agreeing for the most part on how the different technologies work.  Can't we declare a truce? ;)
« Last Edit: December 06, 2011, 06:53:53 PM by ShapeShifter »
 

Offline billt

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Re: FPGA for dummies
« Reply #52 on: December 06, 2011, 06:52:27 PM »
Quote from: persia;670474
But if you tell the FPGA to create a gate, how does it do that?  What is the FPGAs actual method of creating a gate inside itself?  How does it remember that gate? What is actually going on at the physical level?  Surely there aren't a lot of nano-bots building and tearing down hardware inside the FPGA.


OK, but you asked for it. :p This is a bigger question that you may have realized, but fasten your seatbelts for a quick & dirty lesson in the digital logic design that an "empty" FPGA chip actually is.

I seem to have surpassed the single post character limit, so I'll try and split this into two posts.

I'll use terms such as passgate (sometimes also called transmission gate), multiplexer, LUT (lookup table), flipflop, and maybe a couple other terms which I will not define here. For those that do not already understand their definitions, I'll leave them as research topics for you, but I'll give a little description of how they are built. Read elsewhere for more in-depth descriptions. But they are very basic digital design elements.

A passgate for example can be made from a single transistor, but they are often made from two transistors in CMOS technologies. It's a very simple switch, and either connects input directly to the output, or it separates the two ends from each other. To compare with other digital logic gates, a CMOS 2-input NAND gate is made of 4 transistors. A 2-input AND gate is likely made up of 6 transistors (basically a 4-transistor NAND followed by a 2-transistor inverter).
http://www.csee.umbc.edu/courses/graduate/CMPE640/Spring07/cpatel2/lectures/lect16_combo3.pdf

A multiplexor can be made from a group of passgates, to make a sortof passive implementation, or it can be a stack of AND and OR and interter gates to make a more active output drive implementation.
http://en.wikipedia.org/wiki/Multiplexer

A flipflop (slightly more complicated than a latch) is often a loop of storage elements with passgates in between, and when the clock sets the input side passgate to open or closed, this allows the flipflop input value to overdrive a different stored value in order to have the flipflop replace its previously stored value with the current input value.
http://en.wikipedia.org/wiki/Flip-flop_(electronics)

FPGA silicon is a fixes silicon array of logic elements with a lot of fixed wires between them. Each wire is a segment, not a complete path, but it is a length of metal drawn across the silicon.

A logic element is made up of a LookUp Table (commonly shortened to LUT for less typing), one or more flipflops, and a bunch of multiplexors and passgates, and SRAMS which store your design configuration.

The LUT is a small memory with some multiplexors on the output side. When the FPGA is configured on powerup, this memory is programmed to contain the output 1 and 0 values of the logic gate you want it to become. The inputs to your logic gate control multiplexors which select a particular bit of the memory, and the value of that memory bit is your 1 or 0 output value of your logic gate. I may have said in a previous post that the address bus of this LUT memory make up your logic gate inputs. If I didn't already correct that, the address to your memory is only used during configuration of what is held inside the memory. After configuration, the contents of this LUT memory are "fixed". Most FPGAs today are made from SRAM based LUTs, so they can be reprogrammed from one power cycle to the next to do different things, and this also allows possibility of reconfiguration while the system is on and running. (see Reconfigurable Computing) Older FPGA silicon designs used fuses (or anti-fuses which close when told to do so) to set the 1 and 0 logic values, and they were typically NOT changable. If you found a bug in your circuit design, you put that buggy chip in the trash and bought a new chip. A FLASH based FPGA may have small flash memory inside your LUT instead of SRAM, or it may have a FLASH storage on-die to contain your design bitstream file to be written to SRAM based LUTs.

The inputs of your LUT logic gate control the multiplexers on the output side of the LUT memory. They select which bit of the LUT memory is connected to the ouptut signal of your overall "logic gate". The bitstream configuration determines if bit 0 contains a 1 value or a 0 value, of bit 1 contains a 1 or 0 value, if bit 2 contains a 1 or 0 value, etc. The multiplexers do not know the contents of the LUT memory, they only connect the desired LUT memory bit to the output wire.

The output of your "logic gate" LUT goes to a flipflop, perhaps directly to more than one if you want to decide between rising edge clocking or falling edge clocking or perhaps other versions of flipflops that have clear or reset controls or not. Another multiplexor will select if the direct LUT output value is the ultimate output here, or if (one of) the flipflop output is the ultimate output of this logic element. If you have clear and/or reset controls on your flipflops, then even more multiplexors are used to select which wire connects to those signals. And even other multiplexors to select which wire connects to the clock of the flipflop, and perhaps if there is an inverter to the clock or not.

The various input bits of your logic gate are connected to multiplexors which make connections to the mass of wire endpoints available to your logic element. Lets say we have a 4-bit SRAM memory as our LUT memory.

To make your logic element (LUT + multiplexors + flipflop) "become" a 2-input AND gate, which has input wires A and B, and output wire D,
multiplexer 1 chooses between bits 0 and 1 of the LUT
multiplexor 2 chooses between bits 2 and 3 of the LUT.
multiplexor 3 chooses between the outputs of multiplexwrs 1 and 2. (I wish I could draw that schematic here)
write a 0 value into bit 0 of your LUT
write a 0 value into bit 1 of your LUT
write a 0 value into bit 2 of your LUT
write a 1 value into bit 3 of your LUT

a fixed 0 value is set to control multiplexor 1, so it is fixed to connect bit 0 to its own output.
select wire A to control multiplexer 2.
select wire B to control multiplexer 3. The inputs to multiplexer 3 are the outputs from multiplexers 1 and 2.

The digital logic truth table for a 2-input AND gate is:
A B | D
0 0  | 0
0 1  | 0
1 0  | 0
1 1  | 1

Multiplexer 1 is fixed to output the value of LUT bit 0.
When wire A is a 1 value input to multiplexer2 1, then it connects bit 3 to the output of multiplexer 1. If wire A is a 0 value, then it connects bit 3 to the output of multiplexer2.

When wire B has a value of 1, it connects multiplexer 2 output to the LUT output wire C. When wire B is a 0 value, then multiplexer 3 connects the output of multiplexer 1 to wire C.

So, if wire B is 0, then the value on wire A is irrelevant. B as a 0 tells multiplexer 3 to pass multiplexer 1 to output wire C, and multiplexer wire can only select LUT bit 0, which is contains value 0. This acrees with our truth table. (we could even set LUT bit 1 to a 1 and the truth table would still be correct, since bit 1 can never get out of multiplexer 1)

If wire B is a 1, then wire A can have an affect as multiplexer 2 is connected to output wire C. If wire A is value 0, then multiplexer connects bit 2 to output wire C, meaning it connects to bit 2 value of 0 to C. If A is value 1, then multiplexer 2 connects bit 3 to output wire C, meaning it is connected to the bit 3 value of 1 to C.

 (to be continued)
Bill T
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Offline billt

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Re: FPGA for dummies
« Reply #53 on: December 06, 2011, 06:53:07 PM »
(continued form previous post)

Now, we're at point C, not the AND gate D pin. So where are we exactly? We are at a point before the flipflop, which may or may not be used. And C is actually the value input to the flipflop, and is connected to that. There is another multiplexer, let's call it multiplexer 4, which decides which signal our final D wire connects to. One input of multiplexer 4 is our C wire. The other input to multiplexer 4 is the output of the flipflop, which I'll call wire Q. For our truth table, we do not see anything like a storage element, so we will use multiplexer 4 to connect wire C to final output wire D. Wire Q coming out of the flipflop may still toggle different 1 and 0 values, but it is not connected to anything useful, and so has no noticeable affect on our logic element truth table.

Now, how do we tell multiplexer 1 that it will only ever connect bit 0 and never bit 1? How do we tell multiplexer 2 that it is controlled by wire A instead of by wire G? Or that multiplexer 3 is controlled by wire B? Or that multiplexer 4 will only ever connect wire C to wire D, and never wire Q to wire D? And how do we tell the LUT memory to contain binary value 1000 (ie [bit3,bit2,bit1,bit0])?

This is what the bitstream configuration file does. There are other SRAM memories whose outputs control the multiplexer selections. The bits of these "configuration memories" go to the select control signals on even other multiplexers. The inputs of these multiplexers are wires A, B, G, Z, W, etc. and also a fixed 1 value and a fixed 0 value, from each direction that wires come from on the chip. And one each for every input to the LUT (remember, these LUT inputs control multiplexers 1 2 and 3 for this example) And for each A, B, G, Z, W wire coning from direction N, there is a multiplexer to select which one of those sets (ie. the top side set, the bottom side set, the right side or left side set version of wire A here)

The outputs of these multiplexers are the control wires connected to multiplexers 1, 2, 3, 4, and anything else that might be in there. If you want wire A from the left side set, then you have a left side multiplexer selecting A, and you have another multiplexer selecting left side, so this signal goes through two multiplexers in order to connect to the select control on multiplexer 2 in our example. One configuration memory will tell left side multiplexer to choose A, and another configuration memory will tell the side multiplexer to choose left side. (The FPGAs I did layout for had 8-sided elements as things came diagonally as well as orthoginally.) And of course you have another chain of multiplexers to get top side wire B as the B input to our AND gate.

And the LUT memory value is written in at configuration time, same as when the other "configuration memories" are written to.

If you are not doing reconfiguration, then your design is fixed until power is lost. The configuration memory values do not change. The LUT memory values do not change. You've set your LUT to be your desired truth table, and you've set all those lots and lots of multiplexers to connect the wires how you want them connected, and now it's just an AND gate with two wires coming in and one wire going out.

The reason an ASIC will perform better than an FPGA is, well, an ASIC only needs three wires and six transistors to make an AND gate. (Ignoring the wires inside the AND gate itself to connect up those four transistors) The FPGA implementation of the AND gate has 4 big multiplexers to get A and B to the logic gate. It has two levels of multiplexers to get the desired truth table logic value on a wire, and a third level of multiplexer to say we do not want a flipflop involved. That's 5 levels of multiplexers, compared to ASIC's one level of exact AND gate. The configuration memories are static values, and they do not affect timing or performance through here. But they do take up a lot of space. As do all those multiplexers and that LUT. That's how an ASIC die can hold so much more logic than an FPGA die of the same size.

A lot of FPGA chips today are SRAM based LUT design. Not all are though. Some are antifuse, which is a permanent configuration. But other than the method to store the configuration (both LUT and multiplexer etc. selections), there's not a lot different between the two styles.

Hopefully I didn't typo anything. Let me know if there are any questions. Discuss...
« Last Edit: December 06, 2011, 07:09:13 PM by billt »
Bill T
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Offline billt

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Re: FPGA for dummies
« Reply #54 on: December 06, 2011, 07:01:58 PM »
Quote
An FPGA emulates a circuit, because while the components are fixed, it's wiring is not, and therefore the circuit isn't fixed. It imitates a circuit's function by providing user definable wiring. Wires are part of a circuit, and these aren't fixed here.


Does it make a difference that, for the duration of being powered on and after writing the bitstream into the FPGA configuration memories, that the wiring and everything IS fixed until you power it off?

(ignore reconfiguration for now, as Minimig does not, the bus and memory controller on CSPPC does not, Prometheus PCI bridge, etc does not do this)
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Offline billt

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Re: FPGA for dummies
« Reply #55 on: December 06, 2011, 07:04:44 PM »
Quote
An FPGA just removes a layer of abstraction, otherwise it's largely the same.

Please describe the layer which has been removed. Are there any additional layers below? Please describe any that remain as well as the one removed. I've tried to give as detailed an explanation of my understanding of FPGAs as I can in a lunch hour. Please do the same.
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Offline billt

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Re: FPGA for dummies
« Reply #56 on: December 06, 2011, 07:06:54 PM »
Quote
These lookup tables are similar to SRAMs, and this is why FPGA contents is volatile.


Please discuss this detail in reference to antifuse based FPGAs.
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Offline Fats

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Re: FPGA for dummies
« Reply #57 on: December 06, 2011, 07:11:35 PM »
Quote from: persia;670468
The FPGA isn't a 68K chip, it's emulating one.  A different FPGA emulates the custom chips.  Amiga OS runs on top of this emulated hardware.  UAE emulates a 68K in a program, this same program emulates the custom chips.  Amiga OS runs on top of this emulated hardware.


And an A4000 is an emulation of a A1000 with some extensions added :)
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Offline billt

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Re: FPGA for dummies
« Reply #58 on: December 06, 2011, 07:11:59 PM »
Quote
And there we have it: Lookup tables. This means there's no physical chip, which means it's an emulation (imitation).

Crack open my FPGA chip and put the die under a microscope. I'll point to the lookup tables. I'll point to the die. I challenge you to prove that neither is where I'm pointing to. An empty package wouldn't make a very good component for your [insert final product PCB here]...

Quote
Or perhaps it's about the meaning of the word 'emulation' being interpreted in different ways.

I think you're right there. It seems my definition of "implementation" and your definition of "emulation" are stepping on each other.
« Last Edit: December 06, 2011, 07:16:20 PM by billt »
Bill T
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Offline shoggoth

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Re: FPGA for dummies
« Reply #59 from previous page: December 06, 2011, 07:16:23 PM »
Quote from: billt;670532
Please discuss this detail in reference to antifuse based FPGAs.


I just mentioned SRAM-based devices because one of the posters used this to support his/her claim about FPGAs being an emulation of "real" hardware, due to their volatile nature. There are of course other non-volatile technologies as well. Apart from this I don't know what kind of answer you're fishing for here :)