In 2 words
Copyback Cache
First of all, the external FPU only accesses memory via the cpu itself (AFAIR), that is, when it wants to fetch some data from memory, it signals the CPU, which gets the data and then sends it to the FPU. It doesn't access memory by itself. This is part of the reason "on chip" FPUs are so much faster than external ones.
To the 680x0/PPC combo
Essentially, neither CPU was particularly designed for multiprocessing. Both the 68040/68060 and 603/604 implement copyback caches, so whenever they write to an area that is cacheable, it doesn't necessarily go to that area immediately. Instead it goes into an area of on-chip cache and will be pushed when it's most optimal to do so. Disabling this cache cripples both cpus (if you can turn off your copyback on an 040 or 060 card, you will see what I mean).
So, for peak performance, both CPUs have their copybacks enabled. Now, as long as they arent using the same memory area (like two totally different programs), things are fine. However, a ppc task and a mirror 680x0 task that are part of the same application obviously do need to share the same memory.
The context switch comes in when the PPC has to call the 680x0 (or vice versa). The PPC particularly needs the 680x0 to do OS calls on its behalf (eg reading files, putting things on screen etc). Anyway, when this happens, its quite possible the memory they are sharing and the caches of each chip are out of sync due to pending writebacks. So each CPU has to purge its cache, resyncing all the data.
It sounds bad, and indeed it is, but frankly there isn't much you can do about it. Disabling the copybacks cripples performance all of the time, cache flushing only cripples when it occurs. So the latter is generally better.
