ACA500 with 2 MB fastRAM + Kipper2k 4 MB fastRAM expansion work simultaneously?

[paul1981]

Some slaves require a 68020 or above CPU, even though they were standard A500 games (slave issue, not any fault of WHDLoad).

[Motormouth]

A500+ max. 2 MB slow RAM = chipRAM possible. The Agnus 2 MB only.
ACA500 C00000 1,8 MB slow RAM how?

Kipper 4 MB RAM speed? ACA500 2 MB RAM speed?

This right? The kipper card seller said it:
"The aca500 don't work with kipper2k fastram. The aca500 use external cpu and set off the internal cpu, the internal expansion from kipper2k is connected on to internal cpu."

Is the most important problem not the 2+4 MB fastRAM addresses?
If ACA500 = 4 MB fastRAM, then not problem. I would have bought a ACA500 already (no kipper card). 2 MB fastRAM + 2 MB chipRAM too little to WHDload. I tested.

What is the ACA500plus specifications (130 euro)? 4 MB RAM? Faster CPU, 25 MHz?
http://www.vesalia.de/e_aca500plus.htm

From a physical point of view trap door slow ram and chip ram where physically the same types of chips with the same type of speed.
However Chip ram and slow ram are not equal from an addressing point of view.  Chip ram address starts at 000000 vs C00000 for slow ram.  What make chip ram so important is that the custom chips can directly address chip ram whereas slow and fast ram need to hit the CPU to be addressed.  This is why Chip ram is so important for video.

a common configuration for old pre ECS A500s was 512k chip and 512k "slow" ram.  Which is why many older games expect "slow" ram.    The addition of true "16 bit fast" ram does give the A500s or A2000 a bit of a kick over having just slow ram. you can see this the difference in Sysinfo or other benchmarks.  Most version 6a and newer A500s have ECS Agnuses.  Most of these A500s have been modified to have 1 meg of chip ram and no "slow" fast ram.

[psxphill]

What make chip ram so important is that the custom chips can directly address chip ram whereas slow and fast ram need to hit the CPU to be addressed.

Agnus controls access to both chip and slow ram, what was missing in the original fat agnus appears to be just the extra bits in the dma address registers (I suspect they just ran out of time to do the changes).

However it's gary that controls where the second 512k appears in the cpu memory map. I haven't tried it but I suspect that on an ECS agnus with the slow ram appearing to the cpu at c00000 that it is accessible by agnus dma at 80000.

Originally c00000 appears to have been real fast ram that was supported by an a1000 expansion that looks remarkably similar to the ranger prototype (and in some official documentation is referred to as ranger ram). Supporting it in fat agnus seems to have been a direct response to the fighting going on at the time.

OT ranger rambling....

The UHRES registers in ECS/AGA appear on the face of it to be the VRAM that Jay was going on about. He did say the chips were finished. I don't know what agnus chips got them.

http://amiga-dev.wikidot.com/hardware:bplcon0
http://amiga-dev.wikidot.com/hardware:sprhpth
http://amiga-dev.wikidot.com/hardware:sprhdat
http://amiga-dev.wikidot.com/hardware:sprhstrt
http://amiga-dev.wikidot.com/hardware:sprhstop
http://amiga-dev.wikidot.com/hardware:bplhpth
http://amiga-dev.wikidot.com/hardware:bplhmod
http://amiga-dev.wikidot.com/hardware:bplhstrt
http://amiga-dev.wikidot.com/hardware:bplhstop

You need vram and a whole load of external logic to make them actually do something though. All the agnus is doing is putting out addresses for each line and a tag on the rga bus that the external logic is looking for. These addresses are then given to the vram to tell it to start shifting the sprite and bitmap data out. The advantage is that agnus doesn't have to fetch any of the display data over the chip bus, leaving the blitter and cpu pretty much alone. You would still need something complex to fetch the sprite data at the beginning of the line, then merge it with the bitmap data. The format of the data is unknown, there is only one set of pointers so it was either 2 colour or it was chunky. Blitter line and area fill isn't really suited for chunky, but copying would work (it had 4096 colours but no details of how many simultaneous colours).

I am not sure if denise would have been used for the 1024x1024 UHRES mode, but it's possible that ECS denise was and the rga bus was somehow switched between agnus and the vram output. If a different chip was used to generate the display then I don't think you can have UHRES and PAL/NTSC modes at the same time anyway as according to the documentation enabling UHRES disables the horizontal start/stop timing in agnus.

Whether the external logic was shrunk down into a single chip or was similar to the huge a1000 motherboard is lost to time. It's odd how they were supposedly really struggling with gate budget in agnus and denise but there is this whole subsystem that never even got used.

You could probably abuse the registers for something else entirely. It would be nice if Apollo could emulate the 1024x1024 UHRES output too.

[Motormouth]

Originally c00000 appears to have been real fast ram that was supported by an a1000 expansion that looks remarkably similar to the ranger prototype (and in some official documentation is referred to as ranger ram). Supporting it in fat agnus seems to have been a direct response to the fighting going on at the time.

OT ranger rambling....

The UHRES registers in ECS/AGA appear on the face of it to be the VRAM that Jay was going on about. He did say the chips were finished. I don't know what agnus chips got them.

This is quite interesting.... particularly with the real fast ram being at C00000 in the A1000.  I never got to play with an A1000.  The first Amiga I programmed was an early vintage (1987 ish) A2000HD with a 2090a hard drive controller and 2 megs of fast ram.  Except for the buster and zorro II bus they were near identical to the A500.  The addresses I was quoting should work with the A2000 and A500.