So the end results are based on the actual method used.
Yes, depending on restrictions and requirements of the method used. IEEE compatibility and similar accuracy and behavior as the standard PPC FPU are requirements for emulating or trapping the PPC FPU without problems. There are many ways to get floating point support with the P1022 CPU with widely varying performance.
1) Best: Recompiling software to use the P1022 GPR FPU should give good FP performance but the executable will only work on the Tabor board. This is hardware FP.
2) Good: Recompiling software to use software floating point should give fair FP performance and should work on standard PPC hardware with or without an FPU. This is software FP usually using a floating point library provided by the compiler.
3) Poor: Emulation or JIT emulation of the standard PPC FPU gives fair performance without recompiling but with much development time, overhead and resources used for the emulation and possibly bugs or problems due to the complexity. The results of this method were not shown in the article you linked.
4) Bad: Trapping all the standard PPC FPU instructions and emulation of the standard FPU has major overhead for each trapped instruction but recompiling is not needed and it is simpler than (JIT) emulation. The results of this method would be the FastFPE and NWFPE method in the article you linked.