This is sounding more and more like a dictatorship. I get the impression that you want an incompatible MMU solution so everyone has to run MMULib.
Actually, I want a solution that is easy to integrate into an FPGA core. The current MMU design of the 68K cores is pretty much "high level" and calls for microcode, but that's exactly what FPGAs are not designed for, so I understand Gunnar's hesitation to exactly re-implement that. All I'm trying is to find a way out and offer a bridge for that.
Another design would be to use a software-emulation of the MMU table walk, and this way the FPGA MMU could emulate a 68K MMU, with software support. That would pretty much work like the integer instruction emulation that is now in the simple Phoenix core for the first generation of Vampires. This design would also work, though it is necessarily requiring more complex software and is necessarily less performing.
For me, the easiest would be if I wouldn't have to touch any code, but that's unlikely to happen given the complexity of the task at hand and the performance and hardware implications. But calling it a "dicatorship to make you use my code" I find rather harsh. Just to remind you, all the other "system authors" no longer support anything of their stuff, so thanks for the flowers.
Your friendly dictator, Thomas