Z1 Bus signals

[tonyw]

I'm building an external Flash ROM reader/writer/programmer to plug into an A500 (look, I've got one already, OK?). Most of the bus signals are pretty mundane, but what about the UDS and LDS signals? LDS means Low Data Select (bits 7:0), UDS means Upper Data Select (bits 15:.

When do I need to use them? Is it during a Write (Byte) operation, or a Read (Byte) operation, or when?

tony

[Stedy]

Hi Tony,

I'm building an external Flash ROM reader/writer/programmer to plug into an A500 (look, I've got one already, OK?). Most of the bus signals are pretty mundane, but what about the UDS and LDS signals? LDS means Low Data Select (bits 7:0), UDS means Upper Data Select (bits 15:.

When do I need to use them? Is it during a Write (Byte) operation, or a Read (Byte) operation, or when?

I'm not too sure about the exact connections of your system but I can add some general advice. If you select/enable the programmer using a chip select (CS) line then you could ignore UDS/LDS.

Have you got a circuit of your programmer?

[Cyberus]

tonyw wrote:
I'm building an external Flash ROM reader/writer/programmer to plug into an A500 (look, I've got one already, OK?). Most of the bus signals are pretty mundane, but what about the UDS and LDS signals? LDS means Low Data Select (bits 7:0), UDS means Upper Data Select (bits 15:.

When do I need to use them? Is it during a Write (Byte) operation, or a Read (Byte) operation, or when?

tony

Hi Tony,
Not sure if I'll explain this very well.
The R/W line determines whether a byte or word is read or written, as you probably know.
The UDS and LDS lines 'Upper Data Strobe' and 'Lower Data Strobe' is used to make the selection between a byte (8 bits) and a 'word' (16 bits).
Now, the address bus always word-addresses memory, but during byte access the processor will simply transfer half a word (i.e. a byte) during byte access, and this will either be the upper half or the lower half of the word,  which is signalled through UDS or LDS - one of them will be set to 9 whilst the other will remain at 1 [UDS and LDS are active when low]. To access a 'word' both lines will be set.

[tonyw]

Thanks for that, Cyb.
 
That's more or less what I understood. Since I'm going to write the code anyway, I can guarantee the transfer type.

What determines whether it's going to use the high or low byte? Is it an even/odd address, like this?

If I read.b 0x0080 0000, CPU asserts LDS and only looks at bits 0-7;
If I read.b 0x0080 0001, CPU asserts UDS and only looks at bits 8-15;
If I read.w 0x0080 0000, CPU asserts both and looks at the whole word.

If that is right, then I need not worry, since I'm not going to use the upper 8 bits at all. I'm just going to map the bus address to the ROM address so that each 16-bit bus address maps to an 8-bit ROM byte.

Hopefully, I can just use LDS as the strobe for everything.

tony