A 6502 is capable of .500 MIPS? Get outa here!
Just seems odd in comparison to the 68000 .7 MIPS (which we all know as to be true according to SysInfo, LOL)
Considering that there are a number of instructions on the 6502 with two-cycle execution times (though there are plenty more in the 3-5 range) this isn't actually an unreasonable figure (though you'd be hard-pressed to write code with
only the two-cycle instructions and thereby manage a full .5 MIPS on a 1MHz 6502.)
It's also a great example of why MIPS is completely bogus for cross-architecture comparison. The 68000 ran at higher clock speeds than the 6502 (though later CMOS 6502 derivatives eventually caught up,) and is
much more powerful on a per-instruction basis - but since the average execution time for 68000 instructions is closer to 8-10 cycles and it's hard to go below 4, the disparity when viewed in terms of instructions-per-second looks a lot smaller than it actually
is. Don't get me wrong, the 6502 is a great CPU for an 8-bitter, but while the 68000 doesn't execute as many instructions clock-per-clock, it gets a whole lot more done with them.