Amiga cpu

[lassie]

Hi guys i was thinking is the 68030 faster than the 68EC030? or is it the same. or what is the different between the 2 cpu

[OlafS3]

i think it is without MMU. I do not think that this normally makes a difference

[AmiBoy]

The only difference is that the EC version of the CPU comes without an inbuilt MMU (memory management unit).

At the same clock frequency (i.e. same MHz) they process data at the same speed.

I don't think the Amiga in general ever took advantage of an MMU in any 68K CPU but I could be wrong.

AmiBoy

[runequester]

Hi guys i was thinking is the 68030 faster than the 68EC030? or is it the same. or what is the different between the 2 cpu

I know for the 020, the main, practical difference is the EC version only supports 8 MB RAM. I imagine the same would be the case for the 030

[OlafS3]

a link:
http://stason.org/TULARC/pc/amiga/faq/1-1-What-are-68EC020-68EC030-and-68LC040.html

[psxphill]

I know for the 020, the main, practical difference is the EC version only supports 8 MB RAM. I imagine the same would be the case for the 030

The 68EC020 has a 24bit address bus, like the 68000. So it's 16mb minus roms & IO. On the A1200 you might have only been able to get 8MB fast ram, but you could probably squeeze some more in there.
 
The 68EC030 has a 32bit address bus. It's only difference is the lack of MMU.
 
EC just means it's cut down for embedded use.

[runequester]

I stand corrected. Thanks guys!

[lassie]

Thanks for your answers

[Zac67]

The MMU was only ever used for ROM shadowing or for generating virtual memory (with extra tools).

[matthey]

The MMU was only ever used for ROM shadowing or for generating virtual memory (with extra tools).

And for fixing the 68030 write allocate bug which is faster than the other solutions .

Second time today I post this link: http://amigadev.elowar.com/read/ADCD_2.1/AmigaMail_Vol2_guide/node0161.html

Quick explanation: 68030 data cache always caches long aligned writes, even if destination address is supposed to be uncacheable. Following read(s) from same address come from cache, not from memory that may have been modified by some DMA device.

AFAIK this can be only fixed by using MMU to mark required memory regions as uncacheable. (if CPU is non-EC)

[Nostalgiac]

The MMU was only ever used for ROM shadowing or for generating virtual memory (with extra tools).

back way then I was glad with my full 030 on the A2630 as running the virtual memory solution (sorry, forgot which) was actually quite useful on my old setup.

Tom UK

[commodorejohn]

ROM shadowing's plenty handy too, especially with faster accelerators with onboard RAM.