FPGA for dummies

[NorthWay]

This is funny. No, make that amusing.

Jay Miner and crew did old-fashioned logic design, possibly with pencil and paper, at best with some pretty rudimentary electronic tools. Remember how they went out to buy workstations the moment C= bought them up? Digital design required some top notch equipment (like Apollo workstations).

So, Meet Joe Pillow: A heap of chips, wires, and boards.
Now, take a look at AGA. Anyone think that was not designed in VHDL or Verilog? Can't be for a proper Amiga those then.

[freqmax]

Papper is just emulation of real writing..

I thought the Amiga team used SAGE computers (aka "Agony") ..?

[billt]

I consider emulation when the underlying layer has to use clock cycles to propagate state translations from the guest hardware to the real hardware API.

That's not a requirement of an FPGA implementation.You can do truely combinational logic in an FPGA, select the final mux to pass the non-flipflopped signal instead of the flipflopped signal. No flipflop, no clock. Only passgates, multiplexers, and buffers, and none of those need a clock to be present for them to work. None of them even have clock pins to connect one to.

If your own circuit is a sequential thing, such as a state machine, then you will need to use flipflops to implement that, same as you need to do in a custom ASIC. You can't do sequential without a clock. And the clock involved in the FPGA here is the one for your own circuit design, not some FPGA "background" clock. There is no FPGA "background" clock driving the FPGA silicon to act like your own circuit.

Regarding the Meta-FPGA, it's an interesting project because it eliminates the vendor-lock-in of synthesation software. In fact one could order a basic FPGA ASIC with plain fabric if enough money could collected to cover startup costs. Every extra chips is as expensive as a postage stamp..

@billt, url of that 404-site?

http://ce.et.tudelft.nl/~reinoud/mpga/README.html

[billt]

It's not 1:1 because the cell in the FPGA is nothing like the gates in an ASIC.

If you make a scan and put that into a custom ASIC, then yes it is an exact 1:1 copy. I was under the impression that the definition of simulation/emulation in this thread included
ASICs that did not come from the original VHDL/schematics.

undocumented behaviour is not the same because alot of them rely on the analogue behaviour of digital gates and the cells in the FPGA aren't going to behave like that at all.

Analog behavior of the digital gates?! Eh? How does an AND gate behave any differently than an AND gate due to this magical Analog nonsense?
 

when you build an asic from VHDL you would just put the gates in, but electronically they are still going to be different than the original. So any analogue effects (resistance/capacitance etc of the circuit) may differ just because of different lengths and the gate chemistry.
 
If you take a look at resid then you'll see how difficult it is to simulate a sid chip using digital concepts.
The colour generation in vic is analogue based, because it operates in NTSC/PAL colour space.

You can determine what is a resistor, what is a capacitor, etc. in the die scan. To a little probing to associate resistance/capacitance/etc. values to feature sizes, and implement those values in your custom ASIC remake. Analog clone. Direct from the original die itself.

[freqmax]

That's not a requirement of an FPGA implementation.You can do truely combinational logic in an FPGA, select the final mux to pass the non-flipflopped signal instead of the flipflopped signal. No flipflop, no clock. Only passgates, multiplexers, and buffers, and none of those need a clock to be present for them to work. None of them even have clock pins to connect one to.

If your own circuit is a sequential thing, such as a state machine, then you will need to use flipflops to implement that, same as you need to do in a custom ASIC. You can't do sequential without a clock. And the clock involved in the FPGA here is the one for your own circuit design, not some FPGA "background" clock. There is no FPGA "background" clock driving the FPGA silicon to act like your own circuit.

I'm talking about translating between hardware environments by means of cycling through translation stages. Which in most cases is implemented by means of software.

MPGA - Meta Programmable Gate Array, version 0 brought back

[psxphill]

Now, take a look at AGA. Anyone think that was not designed in VHDL or Verilog? Can't be for a proper Amiga those then.

All you've said is that AGA isn't OCS.
 
How commodore made AGA is irrelevant, it's how you make something that behaves like AGA that is important.
 
Neither natami or winuae is a proper amiga.

[mikej]

If you make a scan and put that into a custom ASIC, then yes it is an exact 1:1 copy. I was under the impression that the definition of simulation/emulation in this thread included
ASICs that did not come from the original VHDL/schematics.



Analog behavior of the digital gates?! Eh? How does an AND gate behave any differently than an AND gate due to this magical Analog nonsense?
 


You can determine what is a resistor, what is a capacitor, etc. in the die scan. To a little probing to associate resistance/capacitance/etc. values to feature sizes, and implement those values in your custom ASIC remake. Analog clone. Direct from the original die itself.

I'm quite enjoying this thread.

psxphill, note that both billt, myself and a few others on here actually do design ASICs.

Billt's comments are completely correct.
Lets have one more go at explaining this. (Billt, please ignore the simplifications)

An Amiga ASIC is a standard cell part, so it consists of a regular grid of gates, chosen by either a synthesis tool working from a high level language, or directly chosen by the designer. Each gate is a simple logic gate, or flop. These gates are connected together by routing layer(s) in a grid above the gates.

An FPGA is also an ASIC, which consists of a regular grid of configurable gates, overlaid by a fixed routing grid with programmable connections. So, rather than choosing the configuration of each gate, and the routing when you make the top masks for the Amiga chip, we can configure it on the fly.

Now, assuming pure digital circuits then the original ASIC and FPGA configured with the same netlist will behave 100% identically.

You talked about "adding extra gates to get the exact behavior" - well, the strange behavior is purely a result of the logic in the chip.

To give you an example, in the 6502 some of the "undefined op-codes" are a result of an incomplete decode PLA. What happens is some internal nets are undefined, and we can tell from the design if they are likely to float in one direction (high or low). Then, we get the same behavior. If it is unpredictable then different 6502 devices will also behave in different ways.

You also talk about the routing delays being different. This is true, and also true between different batches of the same ASIC. As long as the logic resolves before the next clock cycle, it doesn't matter how long it takes. That is why we have timing analysis to prove the design is stable.

/MikeJ

[A6000]

If it looks like a duck, walks like a duck and quacks like a duck then it is a duck.
Or in this case, an Amiga.

Next you'll be arguing about whether computers can ever be classed as intelligent.

[freqmax]

My toaster is conspiring against me!

[Thorham]

If it looks like a duck, walks like a duck and quacks like a duck then it is a duck.

What if it's a robotic duck?

Next you'll be arguing about whether computers can ever be classed as intelligent.

Ha ha, I'll bite.

No, they can't. Same goes for the brain, because it's the neural connections that make a brain able to do anything in the first place. No neural connections=no functionality=no intelligence. Applies to computers as well: No software=no functionality.

The question therefore becomes: Can humans write intelligent software?

[persia]

Perhaps it is this:

[amigadave]

"Proper Amiga", "Real Amiga", "True Amiga", "The Real Thing".  Oh wait, that last one is from a Coca Cola commercial.:roflmao:

These arguments from the "Faithful" about what is "Real" and what is a form of emulation are so ridiculous and narrow minded (and tiring).  If you want to follow their dogma to the letter then maybe everything that came after the A1000 should be considered emulation?  Or should we go back further and consider everything that came after the original prototype breadboards with the mass of wires that were used as a proof of concept before the custom chips were first fabricated, to be emulation as well.

Why can't the fanatics that try to turn this into a holy religion realize that there is no ONE definition of what a "Real" Amiga is anymore. Not even between the most hard core fanatics can they agree what is accepted as a "Real Amiga" and what is labeled as "Clone", "Emulation", "Copy", "The Evil Destroyer of Amiga", etc.

Stop wasting so much time and energy arguing what is what and enjoy which ever versions and flavors of the Amiga experience that you see value in.  I have been using the term Amiga inspired a lot lately, because I think that it fits my interests of all things that have their roots in the original Amiga.

Celebrate how much the Amiga has inspired so many different people in so many different ways and the profound effect it has had on all of us.  Celebrate how we are tied together, instead of focusing on how we are different and fighting with each other because we enjoy this inspiration differently.  We are all part of the greater Amiga community and should be proud that Jay's "Little Computer" continues to inspire so many people long after it has fallen out of production and lost all company support.

[persia]

@amigadave

ditto.

[billt]

What if it's a robotic duck?

Which side of the uncanny valley is it on?

[billt]

No, they can't. Same goes for the brain, because it's the neural connections that make a brain able to do anything in the first place. No neural connections=no functionality=no intelligence.

Step 1: Synapse.
http://www.gizmag.com/researchers-create-artificial-synapse/18482/
http://www.mit.edu/newsoffice/2011/brain-chip-1115.html

Step 2: Neuron....

[JimS]

"Proper Amiga", "Real Amiga", "True Amiga", "The Real Thing".  Oh wait, that last one is from a Coca Cola commercial.:roflmao:

Why can't the fanatics that try to turn this into a holy religion realize that there is no ONE definition of what a "Real" Amiga is anymore. Not even between the most hard core fanatics can they agree what is accepted as a "Real Amiga" and what is labeled as "Clone", "Emulation", "Copy", "The Evil Destroyer of Amiga", etc.

The problem is that those fanatics have brought this "what is a real Amiga" notion into an argument where it doesn't belong. The original question was whether or not an FPGA implementation was "emulation". I maintain that something like UAE where one computer executes a software program to pretend to be another is "emulation". Replay and Minimig are hardware implementations, same as if you wired one by hand like the Lorraine prototype.
It's got nothing to do with the "realness", "accuracy" "quality" or "amiganess" of the project, simply the underlying technology used to do it.
Sheesh