Hmmm. What do you think is "happening" in the background of an FPGA design? Once it's configured, all that is fixed. Configuration 1's stay 1's, and configuration 0's stay 0's.
Don't have a clue, but the fact that there
is a background in the first place is what matters. For a circuit in an FPGA to work, extra components are needed, and whether they are as active as a software emulation or not isn't important.
In an ASIC, does it make a difference if I use a library cell carrying the name D flipflop which serves the function of a D flipflop, or if I do an ECO design change, have no empty spaces to put another "real" D flipflop library cell that I somehow forgot, and have to combine a handful of NAND gates that I do have room for here and there, in order to effect a D flipflop function instead? Or, oh crap, that NAND gate should have been an AND gate. The AND (6 transistors) is too big to directly replace the NAND gate (4 transistors), but I have room over there for an inverter.
Can't say much about ASICs, but if they have overhead components needed for a circuit to work, while those components aren't part of the circuit design, then perhaps an ASIC is an emulation as well.
Do a NAND plus an inverter emulate an AND gate, or implement it in an ASIC?
Well, you can do an AND gate using a single relay or two transistors. Using two components made of transistors to make another that can actually be made of fewer transistors seems like imitating the behavior of that made part.
An emulated computer needs software. Some group of instructions that are continuously fetched from one of several types/levels of storage somewhere, decoded, ALUed, reading values from parameters and writing values to register or memory destinations, in order to effect the target opcode format, ALU, instruction decode, registers, memory map, etc. In what way do you think this activity is continuously occurring in the FPGA underneath your logic circuit?
In that way? Not at all. Don't ask me how it
does work, but it should be obvious that FPGAs and computers do things very differently.
And another thought about "fixing" an FPGA. We'd once looked into but never sold a metal mask fixation option for our FPGAs, which would replace the configuration SRAMS and the LUT memory with metal hardwired 1's and 0's, should a security concerned customer want to do that to get a fixed die design instead of going through the effort of ASIC conversion. If I had a Minimig core designed to work well in my FPGA, and I did this metal mask replecement, most of the die is the same as the reprogammable FPGA, all those multiplexors are still there exactly the same way, but I can no longer change their controls, have I de-emulaterified this metal hardwired thing?
No, because there are more parts to replace with metal than just the SRAMS and LUT memory.
Thorham, what about CPLDs and ASICs. Are those also considered emulations of the real thing? I mean, in a CPLD, you don't have, say, two transistors which are directly, mechanically connected (such as using a printed circuit board that's custom made, which the components are soldered onto).
Don't know about CPLDs, but in general, if you have a programmable device in which you can make a circuit design actually work, then it's an emulation (also because of extra components needed which aren't part of the design).
