FPGA Replay Board

[mikej]

I don't think Mike J will bury his project like Thomas Hirsch did with his private Natami boards/forums.

Several people have the source code and are actively working towards the first release.
/Mike
p.s. I have some rather nice 68060s now. I'll post some pics.

[digiflip]

No, the Natami is not dead. And considering that digiflip led a personal crusade against Natami some months ago, I would take anything that he says about it with a grain of salt.

I think the bullies at natami forums killed it without any ones else's help.

[freqmax]

So what is the status of the Natami project in short?

[SamuraiCrow]

So what is the status of the Natami project in short?

The main hardware designer, Thomas Hirsch, has left the project and nobody knows if he's planning to come back.  The remaining hardware designers have formed a splinter faction that is working on the Apollo N68070 core with hopes of it making some headway in the industry and releasing binaries of the core as freeware for hobbyists like ourselves.

Correction:  As Hattig pointed out in the next post, Thomas is still planning on coming out with the softcores for SuperAGA or whatever it ends up being called.  He didn't actually leave the team, he left the forum to have more time to work on it.

As for the blame, mainly the one to blame has taken on a big chunk of the project and is working on it anyway.  I haven't spoken to the hardware guys for a long time.  They've taken a lot of flak and don't deserve all of it.  (Some maybe, but not all.)

[Hattig]

The only people to blame for pessimism about Natami are the guys creating the Natami, that have been talking it up for quite a long time. Now the hardware guy just wants to do it all himself as some sort of personal achievement thing... I have very little optimism that it will ever see the light of day in any form close to some of the stuff written on the Natami website. However the hardware did get to a second-board design, so hopefully there is some momentum there to get it completed - probably a long time after the FPGAArcade comes out.

[SamuraiCrow]

I'm watching both projects with interest and am going to try to do my part by working on making better Amiga drivers for AROS 68k.  Specifically, I'm going to try to make the Copper support better than what AmigaOS ever had while still mapping it to equivalent other functionality on graphics cards.

Whether Thomas or MikeB comes out with a next-generation AGA core, either is fine with me.  I just hope we can standardize on some of it so we don't end up fragmenting the Amiga market any more than it is.

Note some corrections in my previous post.

[freqmax]

Now if AROS 68k would work with E-UAE ..

[Hattig]

Good luck SamuraiCrow :-)

I certainly hope that all the FPGA Amigas can implement basic new features in a compatible manner, e.g., chunky graphics modes, 8/16/n channel audio, 24-bit audio, 96kHz audio, 32-bit/64-bit blitter, etc.

[NorthWay]

I wish someone would make an FPGA thingy that lets you do the logic upload by ethernet(something else?) from your pc.

[freqmax]

How much may it cost?

[mikej]

I wish someone would make an FPGA thingy that lets you do the logic upload by ethernet(something else?) from your pc.

You just copy the FPGA file to the SD card, and the board boot loader does the rest.
/Mike

[Lord Aga]

^ Neat
I think this is the best possible solution.

[OlafS3]

I do not believe that "being compatible" is a really big issue. Commercial software is not very propable for both platforms and when will it be developed using the OS and not hitting the hardware (how it happened in the old days because of lack of resources). Ports are often from Linux world and are not hitting the hardware either. Exception perhaps could be demo-programmers. So it is more important that components like CybergaphX or Warp3D are available and identical on both platforms than to have everything on the hardware side identical.

[freqmax]

^ Neat
I think this is the best possible solution.

As long as you don't need to replace the core every 2 minutes..
(due to writing a new one)

Sneakernet vs wired net..

[mikej]

^ In that case you use the JTAG Xilinx programmer connected to the JTAG header and hit the "download" button on the chipscope debugger gui.
The ARM core will recognize the FPGA has been de-configured externally and sort itself out.
/Mike

[freqmax]

Sam trick possible for the ARM CPU simultainously? (ie without altering physical wires)