Since the last thread on this was polluted with rubbish and eventually shut down before we could finish talking about it, I thought I'd continue here. Given that the main culprit for the "rubbish" seems to have been banned, I guess there's no risk of a repeat problem here...
So anyway...
I had a look at the datasheets for the 603e and the 604e to see if there was any truth behind the idea that they use different size busses.
It turns out that there is some truth to it - the 603e used on the BPPC is set for a 32-bit data bus while the 604e has a 64-bit data bus. As it happens, the 603e can utilise a 64-bit data bus as well, which makes it compatible with the 604e in that respect, but on the 603e it's selectable (32-bit or 64-bit) and on the 604e it is not (64-bit only). So the problem is not so much with the processors themselves, as with the design of the BPPC. If the BPPC had been designed to use a 64-bit data bus then the problem would likely not exist.
I don't think it would be possible to complete a modification that would allow the 604e to work on the BPPC, unfortunately. We could design a new memory controller to go on there, but the PCB tracking will be set up for a 32-bit wide data bus so without a complete redesign of the BPPC board itself, my guess is we're stuck with the data bus we've got. And a redesign of the BPPC is just not going to happen!
The only remaining option I can think of is to design a modification that would accept the 64-bit data bus as input, and then present it to the BPPC board as a 32-bit word. The controller would have to wait for the first 32-bit half to be processed, and then present the second half. Would this work? Hmmmm.... I don't know! It certainly wouldn't be a trivial thing to design. So, I think the 604e upgrade is dead in the water unfortunately

Apple Hammer