Info on Sun's upcoming CMT UltraSPARC processor

[Eric_Z]

This is in no way Amiga-related, but I thought that some of the hardware nerds out there would enjoy this anyway.

Take a look

Now bear in mind that IBM's got a similar strategy for it's POWER5 with the difference that the UltraSPARC will cope with not two but four to eight threads simultaneously per core (4).

[Hammer]

.... expensive hardware ....

[whabang]

Imagine the frame rate in Quake running on this baby!!! :-o

[strobe]

I would imagine Quake would run like crap. Sun is the laughing stock of the computer industry. This is the end of the line with regards to the SPARC series (which was flawed to begin with).

[whabang]

Quake will run like a dream on anything with a clock speed higher than 200 MHz...

[bloodline]

I would imagine Quake would run like crap. Sun is the laughing stock of the computer industry. This is the end of the line with regards to the SPARC series (which was flawed to begin with).

Hmmm, I think this is the end of the old SPARC. I think the SPARC is a a good example of a  "Theoretical Processor", as Linus would put it. In theory the SPARC is a wonderful design (well I like it... :-)  ), but in the real world it suffers because real software isn't and can't be perfect.
It's much like the Itanic, in theory that thing should be forming some kind of "Skynet", but in the real world my ZX81 gives it a good run for it's money  :-D

Sun are switching to the Opteron now. I totally believe in that thing, it's an Alpha (AMD did hire the Alpha design team to design it!) with an x86 emulator stuck on the front for the 32bit stuff  :-P (I know painfully simple metaphor, but it works).

[downix]

I would imagine Quake would run like crap. Sun is the laughing stock of the computer industry. This is the end of the line with regards to the SPARC series (which was flawed to begin with).

The SPARC is actually a good design, provided you follow the ISA rather than the methods it's been tried over the years.  Unlike MIPS or PowerPC, the SPARC's basic design has almost never been followed, instead trying out absurd new concepts in hardware processes and organization without considering the ISA's limitations.  

So please, don't bash the SPARC architecture for the failings of Sun.  Fuji's SPARC designs, as is the ESA's SPARC design are both fantastic processors, which are robust and solid performers, outdoing Sun's designs easily in most cases.