Universal Dynamic Recompiler in FPGA ?

[asymetrix]

The Universal Dynamic Recompiler is a very interesting piece of software :

http://mamedev.org/devwiki/index.php/How_MAME_Works

But what are the pros and cons of an FPGA based system ?

We could have a virtual cpu that can emulate different systems and future proof.

Having a 68k cpu in FPGA is a goal. we could try using :

caesar 68k code
http://caesar.logiqx.com/php/author.php?id=mike_coates

Castaway 68k emulator
http://castaway.sourceforge.net/68000.html

but why not be independant and just use the UDR code ?

just some thoughts...