yaqube wrote:
@Frederic
I'm using AT91SAM7S256 right now but I'm thinking about switching to LPC2388. This chip has 2 USB ports which can act as device or host ports. In the future they could be used to connect USB keyboard/mouse/game pads or to be used as Amiga native ports (if someone writes appropriate drivers).
This micro also has 10/100 Mbits/s Ethernet MAC so only external RMII PHY is required. I'm thinking about putting TCP/IP stack on the ARM and make a bsdsocket.library wrapper on Amiga side. That's a plan.
Nice!
Are all the AT91SAM7S pin compatible ?
Do they have enough horsepower to do MP3 decoding ? I am thinking about moving the audio output to the ARM's I2S (I want to use a PCM1742 from TI) and transfering the samples through the SPI. So, Audio and Disk DMA data will go through the SPI bus.
My board will have definitely different form factor than the current one. It's simply too small to accommodate all the goodies.
I will add SVHS and composite video connectors and keep both PS/2 ports.
With SMD components, you can use both sides of the PCB. So 120mm x 120mm is still OK. Usually, I put the RAM on the bottom side to reduce trace lengths between the FPGA and the RAM.
I have a long term plan to do an A600/A1200 PCB replacement. I have already the locations of the connectors using a scanner and Gimp. Maybe you should do that : A600 form factor with DB9 and IDC connectors for the joysticks so you can put it into an A1200 case.
I'm thinking about using SDRAM or SSRAM as chip ram. The SDRAM is much cheaper but SSRAM has very low latency. I have not decided yet.
With the EP3C25Q240, I am able to put a 16-bit 16MB chip SDRAM and a 16-bit 64MB fast SDRAM. The fast SDRAM shares the databus with the PATA port. I am going to use 74LVC646 chips : they are very fast, bi-directional with latches and 5V tolerant.
I'm for EP3C25 Altera FPGA but PQFP240 version has too few IOs. Probably I will end up with 324-ball BGA, I must try to do escape routing from IO balls to see how many can be used on 4-layer PCB, I don't want to use 6-layer PCB.
I looked at that already with the FBGA-256, it is very hard to do because of the 1mm pitch. With the low-cost PCB etching precision (6-8 mil), you cannot even put a trace between two BGA pads. IMHO, the only way is the following :
- 1st row -> 1st layer (top side)
- 2nd layer is ground
- 2nd row and 3rd row -> 3rd layer, vias have to be on BGA pads :crazy:
- IOs on 4th (and maybe 5th row) will be lost unless they are on the outside ring.
- 4th layer (bottom side) is for the voltages. Try also to have as much as possible banks with VCCIO = 2.5V or 3.0V. The Cylone III has better driving capabilities with 2.5V or 3.0V IOs.
If you are not afraid of BGA, put some mobile SDRAMs, they are 2.5V compatible.
The 68SEC000 could be replaced with an expansion connector for the CPU module. In basic version we could use Tobias Gubener's TG68 so no additional board would be required.
On an optional CPU module we could have a 060 with an SDRAM as fast ram and as the emulated hard file speed isn't very impressive I would add a CF connector (and maybe 2mm 44-pin header). The CPU module will have a multiplexed bus so a small FPGA working as a bus bridge, SDRAM controller and HDC will be required. That's my idea.
The best solution I have found so far as expansion bus is to get something like the Colfire's Flexbus but with DDR address/data (16 IOs instead of 32).
24-bit VDAC is a must and also I would like to have 32-bit wide memory so IO pin count is relatively high. That's why I'm thinking about BGA package.
The joy ports will be put on external shift registers to free some IOs and make them 5V tolerant.
Right now I'm working on improving compatibility.
You can reduce the VDAC IOs by using a 28-bit LVDS deserializer from National and 5 LVDS pairs on the FPGA (10 IOs), that will certainly limit your pixel clock.
For the joysticks, the 74LV166A is perfect. You can just put the four directions on the serializer (like on the real AGA Amigas) if you want to stay compatible with the CD32 pads.
Regards,
Frederic
