Of FPGAs and the way forward

[downix]

bloodline wrote:
@SamuraiCrow,

I'm not sure if I follow your thinking here. The FPGA issues aside, since they have been covered by AlexH... I don't uderstand your left brain/right brain metaphore...

Lets look at my aged Althon64 PC (and contrast it with my one of my A1200s with 4meg FastRam)...

correcting a lot of mistakes here

The Athlon: It has a CPU on a bus with some memory, local and for the CPU only.
The A1200: It has a CPU on a bus with some memory, local and for the CPU only.

The Athlon has the memory controller built-into the CPU, requiring all system access to utilize the Athlon whenever they need memory.  Is limited to an 8-bit DMA system.  
By comparison, the Amiga has memory used exclusively for the CPU, and used for the rest of the system.

The Athlon: It has a separate main System bus for all support systems (GFX, Audio, I/O).
The A1200: It has a separate main System bus for all support systems (GFX, Audio, I/O).

No, the Athlon has all support systems running through the CPU bus, opposite of the Amiga which keeps them seperately

The Athlon: It has a GFX CoProcessor (a Nvidia 8600) with it'a own RAM (512Megs) that performs all gfx functions, and capible of massively parallel GP processing.
The 1200: It has a GFX CoProcessor (The Blitter, Copper and barrel shifter) with its own RAM (well shared with the Audio and I/O).

Here is the real difference.  The Athlon has this the opposite of the Amiga, sharing the CPU memory while the Amiga shares the video memory.  The advantage to this is in the fact that the CPU gets undivided memory access in the Amiga, unlike the Athlon[/quote]
The Athlon: It has a dedicated Audio DSP and its own RAM.
The A1200: It has a DMA fed DAC, and RAM shared with the GFX and I/O
[/quote]I don't see many Athlons with audio DSP's. In addition, you remain stuck with the 8-bit DMA system of the Athlon vs the 16-bit DMA of the Amigas.

I could go on... but my point is made, the Athlon is structurally rather similar to the A1200, but massively improved on the idea. Each of the various subsystems are powerful independant devices in their own right. I don't really see how this relates at all to your mataphore?

No, your example fails due to not understanding the underlying design.

[bloodline]

Downx, perhaps if you sort out your quotes I'd be able to follow it...

I honestly have no idea what you are talking about... I think you've misread my post...  since I know you're not stupid... so reread it, cheers :-)

Oh, and yeah, I actually have a DSP in my Athlon desktop (with a Gigabyte Nvidia4 chipset)... and since I was comparing MY Athlon with MY A1200..

PS have you read the old AMD Athon64 technical docs right?

[Damion]

downix wrote:

The Athlon ... Is limited to an 8-bit DMA system.

:-o

[bloodline]

-D- wrote:

downix wrote:

The Athlon ... Is limited to an 8-bit DMA system.

:-o

I can only think he is referring to the old southbridge DMA... I guess he doesn't know that it's not used any more, since DMA is an old concept... with USB, FIrewire and PCI-E

[SyrTran]

bloodline wrote:
I can only think he is referring to the old southbridge DMA... I guess he doesn't know that it's not used any more, since DMA is an old concept... with USB, FIrewire and PCI-E

Wow.  just Wow.

I hope you didn't mean that the way you typed it.

I should probably let Nate answer this himself, as I'll probably get it as wrong as you did.  Yes, DMA is old.  It's as old as the IBM System 360, and it's as old as the Nvidia GTX 280.

DMA stands for Direct Memory Access.  It's not (just) a theoretical concept, or an antique type of data bus, it's a data transfer method, regardless of bus.  It's the method a peripheral device uses to put/get its data into/from memory without getting permission from the CPU.  It's written into the PCI/AGP/PCI-e specs.

An nVidia SLI setup uses DMA.  It doesn't wait for the CPU to fill its (3-way) 3 Gigabytes of texture/data RAM, the CPU tells the GPU where in main memory the data is, and the GPU goes and gets it, itself.  If you have a network connector, it will also DMA its data, as will any SCSI, and most SATA and PATA controllers (hint: UDMA mode).

BTW, Firewire, aka IEEE-1394, aka Sony iLink, also uses DMA.

DMA is also the reason there's a patch for A1-XEs.  If the OS isn't critically careful, the peripheral DMA data can get overwritten by the CPU - while the DMA transfer is still in progress.

[QuikSanz]

Ahh yes, The naysayers are in force. Come on guys, don't sweat the little stuff. A good solution for old hardware is on track and nobody is twisting your arm. Just go out and get one when available. It will probably blow your mind in speed and versatility.

 I for one need to see the Multimedia features that come out of this, should be very interesting.

Chris

[bloodline]

SyrTran wrote:

bloodline wrote:
I can only think he is referring to the old southbridge DMA... I guess he doesn't know that it's not used any more, since DMA is an old concept... with USB, FIrewire and PCI-E

Wow.  just Wow.

I hope you didn't mean that the way you typed it.

Ok, I will have to go into detail then... (Can't anyone on this board use Google?)

I should probably let Nate answer this himself, as I'll probably get it as wrong as you did.  Yes, DMA is old.  It's as old as the IBM System 360, and it's as old as the Nvidia GTX 280.

DMA stands for Direct Memory Access.  It's not (just) a theoretical concept, or an antique type of data bus, it's a data transfer method, regardless of bus.  It's the method a peripheral device uses to put/get its data into/from memory without getting permission from the CPU.  It's written into the PCI/AGP/PCI-e specs.

An nVidia SLI setup uses DMA.  It doesn't wait for the CPU to fill its (3-way) 3 Gigabytes of texture/data RAM, the CPU tells the GPU where in main memory the data is, and the GPU goes and gets it, itself.  If you have a network connector, it will also DMA its data, as will any SCSI, and most SATA and PATA controllers (hint: UDMA mode).

BTW, Firewire, aka IEEE-1394, aka Sony iLink, also uses DMA.

DMA is also the reason there's a patch for A1-XEs.  If the OS isn't critically careful, the peripheral DMA data can get overwritten by the CPU - while the DMA transfer is still in progress.

When you refer to DMA on the IBM-PC compatible architecture you are refering to the old 16bit ISA system, the DMA in this part of the system can only access the lower 16megs of the adderss space. Almost nothing uses this any more... but it is all still included in the southbridge... this is where things like Serial ports, Parallel port, the Floppy drive, Real time clock, Legacy IDE, PS/2 ports and god knows what else antiquated hardware sits.

All modern parts of the system, GFX cards, Sound cards, I/O (USB, Firewire, ATA/S-ATA, Ethernet, etc...) sit on the PCI/PCI-E bus. Which is then connected via the northbridge to the CPU. The CPU has a second local bus where the main system RAM is located... I hope Downx wasn;t suggesting that the System RAM was located on the PCI/PCI-E bus because that would be a pretty horrific architecture. The Athlon64 is slightly different at the top as it use HyperTransport, and my particular Athlon64 actually has three Hyper transport links and its own RAM controler... but that just confuses this issue.

[darksun9210]

i hope this is helpfull, just for the sake of clarity...
Intel x86 architecture:-
CPU connects to the northbridge via the frontsidebus only. no seperate memory bus.
the northbridge has the memory subsystem controllers, and PCIe bus controllers and/or AGP hookup. plus a link to the southbridge which has your basics. USB, Floppy, normal IDE, original PCI, parallel, serial, ps2 yadda yadda yadda.

AMD x86 architecture:-
the CPU has connection to the north bridge via hypertransport (a much more flexable hook up than using frontsidebus). plus the CPU has its own onboard memory controllers and bus connection, so doesn't need the extra hop to the northbridge to get data to and from ram.
the northbridge does the same, except, no need for memory subsystem, as it is all on the CPU, but has PCIe controllers and the southbridge link just like the above.
southbridge does the same job as the intel system.

each has its own advantages and disadvantages.
Intel currently seems to favour a bottom heavy system, as graphics cards can DMA data to and from main memory without bothering the CPU, or its relatively antiquated frontsidebus connection - via the north bridge.
this will change when intel adopts the 'quickpath' system for interfacing CPUs to the system. about that time intel will probably adopt the CPU onboard memory controllers that AMD has championed so far.

AMD favours a top heavy system where the CPU has dominance on main memory access, but everything else needs to use the (primary) CPU as the gate keeper to main memory over the hypertransport link. this is advantagious in a multiple CPU socket system with multiple hypertransport links, as more CPU's equals more memory controllers, and more memory.

i'm not entirely conversant with the hypertransport bus technology, but i'm sure with it being a fairly open interfacing standard, the graphics card bothering the cpu to let it move data around in main memory isn't too detrimental to overall CPU performance....

sorry for the off topic. :-)

[downix]

bloodline wrote:

SyrTran wrote:

bloodline wrote:
I can only think he is referring to the old southbridge DMA... I guess he doesn't know that it's not used any more, since DMA is an old concept... with USB, FIrewire and PCI-E

Wow.  just Wow.

I hope you didn't mean that the way you typed it.

Ok, I will have to go into detail then... (Can't anyone on this board use Google?)

I should probably let Nate answer this himself, as I'll probably get it as wrong as you did.  Yes, DMA is old.  It's as old as the IBM System 360, and it's as old as the Nvidia GTX 280.

DMA stands for Direct Memory Access.  It's not (just) a theoretical concept, or an antique type of data bus, it's a data transfer method, regardless of bus.  It's the method a peripheral device uses to put/get its data into/from memory without getting permission from the CPU.  It's written into the PCI/AGP/PCI-e specs.

An nVidia SLI setup uses DMA.  It doesn't wait for the CPU to fill its (3-way) 3 Gigabytes of texture/data RAM, the CPU tells the GPU where in main memory the data is, and the GPU goes and gets it, itself.  If you have a network connector, it will also DMA its data, as will any SCSI, and most SATA and PATA controllers (hint: UDMA mode).

BTW, Firewire, aka IEEE-1394, aka Sony iLink, also uses DMA.

DMA is also the reason there's a patch for A1-XEs.  If the OS isn't critically careful, the peripheral DMA data can get overwritten by the CPU - while the DMA transfer is still in progress.

When you refer to DMA on the IBM-PC compatible architecture you are refering to the old 16bit ISA system, the DMA in this part of the system can only access the lower 16megs of the adderss space. Almost nothing uses this any more... but it is all still included in the southbridge... this is where things like Serial ports, Parallel port, the Floppy drive, Real time clock, Legacy IDE, PS/2 ports and god knows what else antiquated hardware sits.

All modern parts of the system, GFX cards, Sound cards, I/O (USB, Firewire, ATA/S-ATA, Ethernet, etc...) sit on the PCI/PCI-E bus. Which is then connected via the northbridge to the CPU. The CPU has a second local bus where the main system RAM is located... I hope Downx wasn;t suggesting that the System RAM was located on the PCI/PCI-E bus because that would be a pretty horrific architecture. The Athlon64 is slightly different at the top as it use HyperTransport, and my particular Athlon64 actually has three Hyper transport links and its own RAM controler... but that just confuses this issue.

Yes a horrific design if it was done.  Thankfully it is not.  But you are still tied to the CPU / Northbridge (there is no HT to Northbridge connection in Athlons, the Northbridge is embedded INTO the Athlon, the HT is the connection to the southbridge) for system memory access.  That means whenever this memory is polled for such minor things as, say, keyboard or mouse access, you will find that the memory is, ta da, blocked from CPU access during this time.  The whole use of CPU cache, pre-fetching, all those fun things is to prevent CPU idle during this period.  But as the CPU keeps going faster and faster but a keyboard is still, really, the same thing that was powered by the 4092 way back when, that lag time will get worse and worse.  By putting the CPU's memory front-and-center makes sense for a low cost minicomputer.  But the Amiga instead did a "hey, we have a dedicated RAM for our peripherals" which means that the peripherals ran without bothering the main CPU.  The PC's video and DSP cards are a step in the right direction, but not a complete one.  Intel's new maneuvers for a TurboFlash on board is, really, the best step to this I've seen in ages.  But nothing is handling the peripherals but... the CPU.  Your big huge math engine is resorting to doing the same meanial tasks as an 8088 controller chip.  Some high-end systems such as my Xeon here have an i940 processor for controlling these peripherals, but they are the exception, rather than the rule, and using a general purpose CPU for such a specialized task is crude.  The best route would be to do the "GPU/DSP" route, with dedicated controlling systems for the various peripherals.

[bloodline]

@Downx

Are you smoking crack? My mouse and Keyboard are on USB, which itself is on the PCI-E bus, which is connected to the CPU via HyperTransport... the RAM is connected directly to the CPU, not via an HT link.

Your idea of a computer system seems 15 years old!!!! The only thing on the south bridge is pretty much just the BIOS now (since I don't use any of the legacy ports or floppy disk)...

Start here to refresh your memory:

http://en.wikipedia.org/wiki/Hyper_transport
http://en.wikipedia.org/wiki/Socket_939


And here is a nice picture of the standard PC architecture (Note the different Busses):

[downix]

bloodline wrote:
@Downx

Are you smoking crack? My mouse and Keyboard are on USB, which itself is on the PCI-E bus, which is connected to the CPU via HyperTransport... the RAM is connected directly to the CPU, not via an HT link.

Your idea of a computer system seems 15 years old!!!! The only thing on the south bridge is pretty much just the BIOS now (since I don't use any of the legacy ports or floppy disk)...

Start here to refresh your memory:

http://en.wikipedia.org/wiki/Hyper_transport
http://en.wikipedia.org/wiki/Socket_939


And here is a nice picture of the standard PC architecture (Note the different Busses):

Um, dude, that is what I just said.  The "Northbridge" which includes the RAM controller is integrated onto the die with the CPU in the Athlon, with a HT bus connecting the CPU to the southbridge.

So you agree, for anything to utilize system RAM, it must go through the northbridge, now handily contained within the silicon of the Athlon CPU?  Or what are you saying?

That picture you have is several years old, only Intel still uses that architecture, and Intel is abandoning that next year with their next-generation interconnect technology.  Death to the Front Side Bus!

[bloodline]

downix wrote:

bloodline wrote:
@Downx

Are you smoking crack? My mouse and Keyboard are on USB, which itself is on the PCI-E bus, which is connected to the CPU via HyperTransport... the RAM is connected directly to the CPU, not via an HT link.

Your idea of a computer system seems 15 years old!!!! The only thing on the south bridge is pretty much just the BIOS now (since I don't use any of the legacy ports or floppy disk)...

Start here to refresh your memory:

http://en.wikipedia.org/wiki/Hyper_transport
http://en.wikipedia.org/wiki/Socket_939


And here is a nice picture of the standard PC architecture (Note the different Busses):

Um, dude, that is what I just said.  The "Northbridge" which includes the RAM controller is integrated onto the die with the CPU in the Athlon, with a HT bus connecting the CPU to the southbridge.

So you agree, for anything to utilize system RAM, it must go through the northbridge, now handily contained within the silicon of the Athlon CPU?  Or what are you saying?

Of course... and in that way, System RAM on a PC is like FastRAM on the Amiga. Which was my original point. Just as the Amiga Chipset does not access FastRAM, the Gfx chips and Audio chips do not access System RAM... like the Amiga there is RAM dedicated to the task.

That picture you have is several years old, only Intel still uses that architecture, and Intel is abandoning that next year with their next-generation interconnect technology.  Death to the Front Side Bus!

Given the two biggest PC architectures are AMD and Intel... and the biggest of those is Intel, then that picture is more than adequate!

Now if we refer back to your original post... You will agree that it bears no relation to the modern system.

[downix]

Um, dude, you just destroyed your own arguement.

No, the CPU ram is closer to the CHIP ram, that is, "a shared pool of RAM, used by all peripherals.  There is no PC equal to the Fast RAM, that is RAM used soly by the CPU, without interruption by those pesky peripherals.  Video cards use their own RAM, which is closer to the Amiga's Fast RAM, but is now only for the GPU.

as I said, inverse design.

And, as pointed out, Intel itself is abandoning that design.  FSB are for antiques.

[Atheist]

QuikSanz wrote:

I for one need to see the Multimedia features that come out of this, should be very interesting.

Chris

Hi QuikSanz,

Well, what will intrigue me the most is, an Amiga 4000 w 2 Megs chip, 16 Megs Fast with video toaster + 68060 @ 66MHz (is that the fastest unoverclocked 68060?) w 128 Megs of ram VS. a NatAmi60!

That would be a very compelling stats set.

Also, could we get the performance of a P4 at say 400 MHz?

AOS is so streamlined, that even games that need 1 GHz P4s may actually be able to run on NatAmi60s!

Look at, just how big is DirectX?!? Can't tell me that doesn't use tons of Hz.

[QuikSanz]

Atheist,

I'm not sure if my Cyberstorm can get a memory combo that small, 4 old 4 meg?

If I were to clock that high I would probably want to get a fan and heat sink. It is tight inside my A4000T (Amiga Tech), Not sure I can Make that happen as I recall there is a brace in the way.

However those comparisons would sure be telling...

Chris

[SamuraiCrow]

Update from the Natami website regarding how the memory busses are connected:

Just like the original AMIGA, the NATAMI has two fully separate memory busses.

1) The CHIP-memory bus
2) The Fast memory bus.

The SuperAGA chipset has in addition to this a very small 3rd memory block inside the chipset. This 3rd memory block is a Sprite/3D cache and can be used to accelerate blitting and 3D operations.

The two buses are independent and the NATAMI can do two memory operation at the same time, one to each of the buses.
In addition to these two memory access on the two external buses, the NATAMI Blitter can do several memory operations per clock inside his local store.

The CHIP-memory is 64bit wide and is build from very fast pipelined, syncrones external SRAM.
The fast memory on the Natami60 is regular SDRAM.

A major strength of the original AMIGA design is its DMA capabilities. The Natami is fully compatible to this.
But of course the SuperAGA chipset is faster and can do 100 times more DMA than the original AMIGA chipset.

The original AMIGA could do Audio and Sprite DMA into Chip memory only. The original AMIGA could do SCSI DMA into fast memory.
This means the original AMIGA could do DMA to both memory busses but not fully freely.

The Natami improves this design. The Natami can do all types DMA to both memory banks.

From a programming point of view you can program the Natami liek any other AMIGA.
It good to use the chip memory as always to keep your audio and video data in it.

For best performance you should always store your heavy accessed video data in chip memory. But as  the Blitter can read from fats-memory as well you are more flexible in creating huge games as you can as well store information inside the bigger fast memory.

SuperAGA is many times faster than normal AGA out of several reasons.

a) Blitter and Chipmemory are 64bit wide.
AGA was 16bit wide.

b) Blitter and Chipmemory is much higher clocks. Natami Chipmemory can be clocked to 200 MHz. While the original AMIGA was only working at 3.7 MHz.

c) The Natami Blitter has a local store inside the chip which means if you blit the same sprite many times or draw the same texture several time you only need to read it once. Depending on your game engine this can up to quadruple the overall performance.

So the chip bus is off of the FPGA but there is a 32Kbyte local store for the 3D and vector acceleration portion of the new SuperAGA Chipset.