Well because the two aren't equivalent.
#1 is taking a 68k CISC instruction which can (but doesn't have to) involve several steps to accomplish and breaks it down into those discrete steps. Those are then fed through a RISC core which has been specifically designed to handle the aforementioned discretised 68k instructions.
PROs:
Its how modern x86 cores work.
You can apply lots of fancy things to that simple RISC68k core at it's heart.
To the outside world it looks _exactly_ like a really flipping quick 68k cpu complete with addressing, instruction, bus design. The whole lot, it could be a drop in replacement for a real 68k chip
CONs: hard to do, CISC->RISC decoder takes up transistors and space, decoder extends pipeline causing branch prediction penalties to increase etc etc etc
#2 is completely different. An x86 is just a completely alien device, it has a different endianess, it's buses are different so the way it communicates is different. I wouldn't even know where to begin. Not only that but the instructions that it actually processes are different so it can't even take the 68k instruction and do anything with them. x86 emulators work because they pretend to be the entire machine including the ram where the executable resides.
Attempting to attach an x86 cpu onto a 68k bus is like trying to get a tortoise to go faster by strapping an angry wolverine to it :lol:
