It's too late, its' all been set in stone now.
But I would like to ask: and this is equally an AOS4.0 and MorphOS Q.
Now that we've gone the PPC route, are we doomed to bloated SW like on the PC?
CISC is smaller instructions, but decoded, they use the same amount of clock cycles (as several RISC commands) to execute.
While RISC is smaller 1 clock cycle instructions, and you don't use, on rare occassion, the instruction you don't need, unlike in a CISC, where all of the instruction is used, needed or not.
So, going RISC, we pay with overhead of HD space, and reading into ram from HD, and more ram needed, as well.
Are we ahead, at the same clock speed?
Then, when we go 64 bit, will instructions jump to 8 bytes long, and because of RISC, more instructions are needed than in CISC, bloating SW to collasol sizes?
Also, when they jump to 64 bit, how would windoesnot fare in the bloatware category? Should be scary!
This question is based on my limited knowledge of CPUs, OSs, and compilers, so try to fill in the holes where my statements are flawed.