Is there enough documentstIn about what is in the original chips to figure out how to clone them?
Most of it's in Tim's head and they basically only work because of observed behavior, not technical specifications. The RAM for example runs WAY out of spec, but after experiments it proved to work in practice.
That's why there was never a PAL version. It would have been almost as much work to remake it in PAL timings as making the original NTSC version in the first place. It's not just an adjustment like most people assumed.
I'm sure the source for all the programmable chips is still around, but this was way before Verilog. I think the whole Flyer (including programmable chips and DSPs) is in the OpenVT distribution although I could be mistaken.
I think it would be easier with the fast FPGAs available today. You could focus on what needs to be done rather than finding a hack that makes the timing line up.
I'm sure it's possible, but it would be a major undertaking and would it be useful anymore?