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Author Topic: PPC970 Benchmarks in 32bit mode  (Read 6812 times)

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Offline sTix

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Re: PPC970 Benchmarks in 32bit mode
« Reply #1 on: May 05, 2003, 10:01:17 PM »
Looking good!

PPC ain't dead yet

 

Offline sTix

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Re: PPC970 Benchmarks in 32bit mode
« Reply #2 on: May 05, 2003, 10:02:15 PM »
For those with $ I suppose  :-(
 

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Re: PPC970 Benchmarks in 32bit mode
« Reply #3 on: May 05, 2003, 10:53:26 PM »
Quote
For those with $ I suppose


Pegasos III anyone?  With Dual 2.0Ghz 970's they would kick butt!
 

Offline Hammer

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Re: PPC970 Benchmarks in 32bit mode
« Reply #4 on: May 06, 2003, 12:29:11 AM »
Usually, these benchmarks are the weakest for the current Pentium 4 Northwood. They don’t take into an account of the next Prescott core.   One should compare the incoming product vs incoming product not current product vs-incoming product.

Refer to
http://www.chip-architect.com/news/2003_03_26_Prescott_clues_for_Yamhill.html

http://www.chip-architect.com/news/2003_04_20_Looking_at_Intels_Prescott_part2.html

In balance, the other camp will also move their goal post.  
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Re: PPC970 Benchmarks in 32bit mode
« Reply #5 on: May 06, 2003, 12:32:29 AM »
Have you checked the clock speeds Hammer?

1.4 Ghz vs 3Ghz and it still pisses on the P4.
 

Offline Hammer

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Re: PPC970 Benchmarks in 32bit mode
« Reply #6 on: May 06, 2003, 12:56:10 AM »
Quote

mdma wrote:
Have you checked the clock speeds Hammer?

Yes, but the PPC 970’s pipeline depth is not as deep as the Pentium 4, thus potential for clock increases may not as positive compared Pentium 4. The current Northwood's transistor switching went as high as ~4.1Ghz via LN2 (liquid nitrogen).

(Not including double speed (poor performing) floating point unit i.e. IF the Northwood is rated 3 Ghz, its floating-point unit would be double pumped to 6 Ghz).

Intel does keep in mind that IPC will play an important role in the near future i.e. refer to Prescott’s architectural improvements.    

Quote

1.4 Ghz vs 3Ghz and it still pisses on the P4.

Note that Intel still has IPC bias “Pentium M” (@1.6Ghz) which roughly PR(unofficially)  rated at Pentium 4 @ ~2.5 Ghz ~2.6Ghz for office, legacy floating points and branch extensive applications. It’s pipeline depth is about similar to AMD’s K8.  

Intel has two solutions regards to X86.

IBM (and AMD) may approach chip design from IPC bias then work on the clock speed, while Intel may approach chip design from clock speed bias then work on IPC (the case is true for Pentium 4 family not for Pentium M family). Performance is one factor for comparison but the cost will be another.

Just hope IBM learns from the DEC’s Alpha experience i.e. performance alone doesn’t win the war.

PS Intel's IA-64 department may have duplicated DEC Alpha’s mistake.

I do keep track of the incoming flag chips i.e. IBM’s PPC 970, AMD’s K8 (has been released) and Intel’s Prescott. Just look at my news submissions (via Aorg's  userinfo).

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Re: PPC970 Benchmarks in 32bit mode
« Reply #7 on: May 06, 2003, 01:09:11 AM »
Quote
PS Intel's IA-64 department may have duplicated DEC Alpha’s mistake.


Let's hope so, then we might see an end to the Wintel domination of the desktop/low-end server market
 

Offline Hammer

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Re: PPC970 Benchmarks in 32bit mode
« Reply #8 on: May 06, 2003, 01:44:39 AM »
Quote

mdma wrote:
Quote
PS Intel's IA-64 department may have duplicated DEC Alpha’s mistake.


Let's hope so, then we might see an end to the Wintel domination of the desktop/low-end server market

We wouldn't see the end of  Wintel domination due to following factors;

1. Intel is known to have a Plan B (Intel's "guidelines to the press" restricts this information).

2. Thanks to IBM’s wisdom(or stupidity; take your pick) during early 80s, AMD will act as back up as the second supplier for X86 market. There are now talks of AMD K9 processor (i.e. includes hyper-treading and double pumped units). Transmeta is now(or soon will be) the second supplier X86-32/AMD64.

3. X86 Linux and Microsoft will ship products for X86 platform.  

4. Massive X86 bias supply channels and ISVs will continue to support X86. Just look at the lackluster support for non-X86 (e.g.. Intel's IA-64).

5. The massive X86 software base. This is the fundamental boat anchor why the world is tied with X86 chips.

6. The PowerPC platform is not foreign for Microsoft’s POV since they have Windows NT 4.0 (up to SP3) running on this platform. Windows XP and Windows Server 2003 are based on NT’s technologies. MS’s dotNET (transparent-re-compiling) ecosystem will enable Microsoft spread it’s wings and avoid the earlier Windows 4.0 mess i.e. the need to have separate edition of  PPC/MIPS/Alpha of MS application products. They just need dotNET edition of MS Office dotNET to run on any machine that has dotNET framework (it should sound like Tao's VP). The support for multiple CPU platform shouldn’t be a problem for MS (now armed with dotNET) except for political reasons.
IF it make business sense for MS, going to PowerPC will not be a barrier.

7. IBM may need to find yet another second vendor for supplying PPC 970 as this may be requirement for some the customers.

8. Economic of scale for X86 market.  
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Offline downix

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Re: PPC970 Benchmarks in 32bit mode
« Reply #9 on: May 06, 2003, 01:46:19 AM »
@Hammer

You'd be correct except for a few things:

IBM's 970 is only 1 stage shorter, to begin with.  This makes for a
top Mhz rating of around 5Ghz on the next-generation process.  But IBM
did something Intel didn't:  It made the pipes WIDE.  IBM's throwing
upwards of 12 instructions down the pipes at once!  This means over
200 instructions are flying through this thing's pipes.

Then there's the thuroughput issue.  Intel's still using the
shared-bus approach it pioneered so many years ago to save pin count,
assuming that a single, wide bus would be faster.  In truth, it is
only cheaper than two smaller dedicated-route busses as done up in
older machines such as the Cray.  IBM's got the edge in I/O handling,
being able to both send *AND* recieve instructions on the same cycle.
The latency in Intel's bus design, as it switches from send to recieve
adds hundreds of thousands of wait cycles to the system, all in the
extremely critical FSB area.  IBM's fixed-task busses by comparison
can make full use of the availible bandwidth, delivering on the
potential of the design.

now, let's add in IBM's multiple processor approach, seperate channels
per-processor verses Intel's shared-bus approach.  Means that if you
provide a large enough memory pipe that IBM MP approaches will be
zooming past anything Intel can throw at it.
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Re: PPC970 Benchmarks in 32bit mode
« Reply #10 on: May 06, 2003, 01:52:53 AM »
Sounds great.

Do you two work in the CPU design industry or summat? ;-)

Quote

downix wrote:
@Hammer

You'd be correct except for a few things:

IBM's 970 is only 1 stage shorter, to begin with.  This makes for a
top Mhz rating of around 5Ghz on the next-generation process.  But IBM
did something Intel didn't:  It made the pipes WIDE.  IBM's throwing
upwards of 12 instructions down the pipes at once!  This means over
200 instructions are flying through this thing's pipes.

Then there's the thuroughput issue.  Intel's still using the
shared-bus approach it pioneered so many years ago to save pin count,
assuming that a single, wide bus would be faster.  In truth, it is
only cheaper than two smaller dedicated-route busses as done up in
older machines such as the Cray.  IBM's got the edge in I/O handling,
being able to both send *AND* recieve instructions on the same cycle.
The latency in Intel's bus design, as it switches from send to recieve
adds hundreds of thousands of wait cycles to the system, all in the
extremely critical FSB area.  IBM's fixed-task busses by comparison
can make full use of the availible bandwidth, delivering on the
potential of the design.

now, let's add in IBM's multiple processor approach, seperate channels
per-processor verses Intel's shared-bus approach.  Means that if you
provide a large enough memory pipe that IBM MP approaches will be
zooming past anything Intel can throw at it.
 

Offline IonDeluxe

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Re: PPC970 Benchmarks in 32bit mode
« Reply #11 on: May 06, 2003, 02:03:29 AM »
pipeline depth may not be as great, but the volume is much bigger.200 instructions as against 132 instructions from the last time I looked.
Even if this is wrong we are talking about a 1.4 ghz vs a 3ghz so the Pentium will need a much bigger increase in speed to match a small increase in the 970 to maintain the performance level.

Quote
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Offline Hammer

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Re: PPC970 Benchmarks in 32bit mode
« Reply #12 on: May 06, 2003, 02:09:38 AM »
Quote
IBM's 970 is only 1 stage shorter, to begin with.

According to Ars Technica. The PPC 970 has 16-stages (integer). Current Northwood  core has 20 stages deep.  AMD K8 has 17 stages deep (floating point).

Quote
This makes for a top Mhz rating of around 5Ghz on the next-generation process

Note that Intel has 6 Ghz units (double pumped) as of this moment (from 3Ghz Northwood) using the current process.

Just to break your line of thought, Ars Technica doesn’t even consider the incoming Prescott core. One has to look at http://www.chip-architect.com  

Quote

But IBM did something Intel didn't:  But IBM
did something Intel didn't: It made the pipes WIDE. IBM's throwing upwards of 12 instructions down the pipes at once!

Intel architecture has feature called "packed instructions".

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Offline Hammer

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Re: PPC970 Benchmarks in 32bit mode
« Reply #13 on: May 06, 2003, 02:18:48 AM »
Quote
pipeline depth may not be as great, but the volume is much bigger. 200 instructions as against 132 instructions from the last time I looked.
Even if this is wrong we are talking about a 1.4 ghz vs a 3ghz so the Pentium will need a much bigger increase in speed to match a small increase in the 970 to maintain the performance level.

Note that Prescott's "Instructions in Flight" is at 256.  

http://www.chip-architect.com/news/2003_03_26_Prescott_clues_for_Yamhill.html

IS your POV comparing yet-to-be-release CPU with the current CPU? (Just analyze what you have stated).
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Re: PPC970 Benchmarks in 32bit mode
« Reply #14 on: May 06, 2003, 02:51:07 AM »
Quote
This means over
200 instructions are flying through this thing's pipes.

Note that Prescott  has 256 "Instructions in Flight".

Quote

Then there's the thuroughput issue. Intel's still using the shared-bus approach it pioneered so many years ago to save pin count, assuming that a single, wide bus would be faster. In truth, it is
only cheaper than two smaller dedicated-route busses as done up in older machines such as the Cray.

The price of the machine (purchasing) will play a big part in the desktop PC arena. Money just doesn’t magically appear in people’s pockets…

Quote
IBM's got the edge in I/O handling,
being able to both send *AND* recieve instructions on the same cycle.

Full duplex would be the term to use. I wouldn’t comment on Intel's CPU duplex issues.

Quote
now, let's add in IBM's multiple processor approach, seperate channels
per-processor verses Intel's shared-bus approach. Means that if you
provide a large enough memory pipe that IBM MP approaches will be
zooming past anything Intel can throw at it.

Due to the nature of X86 market i.e. no single X86 CPU vendor has the edge for very given segment. AMD would be the current flag bearer for the X86 multi-processor market (AMD 's Opteron class platform).

I don’t think your average citizen (western level incomes) can afford dual processors based machine. Majority of them can’t even afford the current dual PPC G4 let alone >2-way PPC 970 machines.    

Note that, it's not the first time that Intel has been blown away by the competition in regards to large scale multi-processors e.g. DEC's Alpha based platform is one example in the mid 90s.    
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