Hallo,
The plan is to clock it at 16 MHz. Higher clocks can be achieved, but I don't know how much those 68EC020 can be pushed. They are -16 parts, means were meant for 16.67 MHz, a couple more MHz can be squizzed, but another limiting factor will be the flash rom. 70 ns flash should work even at 20MHz... but all that should be tested.
Remember that memory will be accessed in 3 cycles (except chip of course), so that should achieve maximum throughput... and so performance.
I'm a bit late with this due to my phd demanding some work from my part ;-) but hope to get again on track very soon.
The A500 version uses the DIP connector, so should be pluggable in an A2000, but I don't have one to test... (any volunteers ;-))
regards, and thanks all for the great support !, I hope I can deliver something soon