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Author Topic: Accelerator hardware theory  (Read 9341 times)

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Offline AJCopland

Re: Accelerator hardware theory
« Reply #44 from previous page: May 06, 2008, 07:19:35 PM »
If you did you could start with something like this design.

Andy
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Offline countzero

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Re: Accelerator hardware theory
« Reply #45 on: May 07, 2008, 02:33:59 AM »
Quote

AmiJIm wrote:

cut the power from the onbaord 68k ,it goes in active then add power to the second cpu on the accel board.


it doesn't work that way. there was a proper way of halting the onboard CPU with the bus signals but I don't remember right now. Anyway check 68000 bus specifics for more information.
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Offline rkauer

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Re: Accelerator hardware theory
« Reply #46 on: May 07, 2008, 06:04:10 AM »
 Actually, you need to "ask" the original processor to grant the bus takeover.

 This is made by a short "negotiation" between the two chips. The second CPU sends a "BR" (bus request), then the 1st give a "BG" (bus granted). After that, the 2nd CPU sends a BGACK (Bus Granted Acknowledgement) and takes over and the 1st becomes halted (that's why the CPU on the motherboard of the Amiga becomes hot, even if it is not used).

 This works in any Amiga accelerator exactly this way.
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