a golden age of Amiga

[Mrs Beanbag]

a understand what your saying on very basic level what is diffrence between fpg
 the simple pic control chips i seen my friend program i know these have very limited storage but seems you can do alot with less , which what your saying .
apart from elagance of working with this whats the practice benifets of this
lower power use.

A pic is a normal, simple CPU with some flash ROM on chip.  You just put a program there and it goes.  It is programmed in C or assembly language and runs sequentially, and typically very slowly.  Although in theory you could design one with an ARM core or a x86 core or whatever.  But the ones you can buy are really simple and tiny.

An FPGA can be rewired electronically to be any kind of chip at all.  It doesn't run a program (unless you design a CPU core on it), it simply reroutes data and performs any logical operation you want in any combination or sequence.  So you can make it do specialist tasks, and do umpteen things at once, the only limitation is the number of logic cells.  Ok that's not the only limitation but it will do for explanation's sake.

[Mrs Beanbag]

I'm sorry, what imaginary current are you referring to?

Well we all know V=IR, right?  Ohm's law.  Well if you let R be a complex number (we write it as Z instead and call it "impedance" rather than resistance) you can model impedance and capacitance as well.  The voltage and current ends up complex as well, of course, which makes no sense, but nevertheless it works.  I don't know what the "impedance" of a memristor would be, I can only surmise that this simple "electronic theory hack" isn't quite up to the task of representing it.  The problem is that it's quite ad hoc, as far as I can tell it's not properly derived from fundamental laws, it's just made up and used because it works.

The function of present day FPGA devices is fixed at boot time, how do you intend to get around this? You may be able to get around it using multiple fast booting FPGAs (see article here: http://electronicdesign.com/article/digital/fpgas-boot-in-a-flash15649.aspx ), is that what you intended?

You can configure the LUTs to act as register files.  The same LUTs that would normally be used to hold your fixed designs can still be changed internally.  They are Read/Write.  What is needed is a design scheme that would let you do this in a useful way.

Whether our FPGA works on memristors or not, we need a design.  You can't just throw memristors at it and magically it becomes reconfigurable on the fly.  It might be reconfigurable quicker, but it will still have the same limitations.  It's not the SRAM that's the problem.  There are strategies for partial reconfiguration, but they all assume the design being fed in from some outside source.

You can design a DMA controller in an FPGA.  If you can access external memory your design can pump data in and populate its own LUTs.  I think a good analogy might be something like Conway's Game of Life.  (Surprisingly, it is Turing complete!  In fact I'm amused by the idea that given a board large enough, one could simulate John Conway.  But I digress.)  The external bootstrap circuit feeds in a small "agent" that has a DMA and a ruleset, the rest of the unconfigured cells are basically its playground, where it can wander about and pull in design blocks through its DMA and write them to the LUTs surrounding it.  We'd need it to be able to grow and branch and create paths that packets can be sent along.

[Mrs Beanbag]

Let me put it to you like this, do you understand how memristors work at the molecular level? Please watch that 6 minute video I posted before:
http://www.youtube.com/watch?v=rvA5r4LtVnc

No I don't, and I watched the video and I still don't.  Solid state physics was never my best subject.

In simple terms, a memristor is a device where the flux and charge affect each other.

Ok well, whatever.  It's still a device that doesn't fit into the generalised impedance model, which I'm saying is inadequate and makes no sense because it was made up ad-hoc to describe only what we knew already.  I'm saying that a better theory might predict even more different types of passive components.

Oh dear. I'm not throwing memristors at FPGAs and 'magically' expecting it to be reconfigurable, I know for a fact that memristors will make FPGA devices reconfigurable, because THE PEOPLE THAT DISCOVERED THE MEMRISTOR ARE SAYING THE SAME THING. Please see here:
http://pubs.acs.org/doi/abs/10.1021/nl901874j

Please stop trying to shoehorn your existing knowledge into this new model, and please try to see that use of memristors can alter the architectural possibilities for FPGAs. Thanks.

Memristors won't make FPGAs reconfigurable, or anything else.  Well maybe it will make them smaller.  It's a switch.  Like the guy is saying, you can replace ten transistors with one memristor (I'll take his word for it).  Maybe that opens up all sorts of new possibilities, but a possibility isn't a device.  You still have to DESIGN a dynamically reconfigurable FPGA, whether you use memristors or not.  No matter what components you use, even if it's alien technology that's a million years in advance of our own, how to design an "FPGA-like device" that you can reconfigure while it's running is still an architectural challenge.  And I'm saying it's possible already, even without memristors.  (With memristors, it would be even better, I guess.)

I can't read the full text of that article you posted, but the abstract doesn't mention anything about dynamic reconfiguration.  "Reconfigurable logic" could describe present FPGAs.

[Mrs Beanbag]

I'm all up for entertaining alternative theories, but would suggest you'll have a better time of forming successful theories about what's happening with these devices if you understand how the electrons are moving in this device. Let's start with the basics: what makes a material positively or negatively electrically charged?

I don't know whether you're leading me or patronising me here.  Why, it's electrons, of course.  I'm not trying to form a theory of "these devices" in particular.  I know there are deeper theories in solid state physics to account for many different things, they are a little over my head to be honest with you.  I don't want to have to worry about individual electrons.  All I want to get my head round for now is what the imaginary components of current and voltage physically represent.  Usually the textbooks just shrug it off and tell you the imaginary components don't really mean anything physical at all, it's just some maths to sweep under the rug at the end of your calculations.  Which makes no sense.  It's all a bit fudged.  If I could just work out how to derive these things from Maxwell's Equations...

Again, you persist by insisting memristors won't make FPGAs reconfigurable. I don't really know how bluntly I should tell you that you're wrong before you'll listen.

Do be as blunt as you feel is necessary.  But FPGAs arlready are reconfigurable, that's what "Field Programmable" means.  The problem is reconfiguring it while it's still running.  The quote that caught my attention was this:

Simulations                   of these architectures have shown that by removing the  transistor-based configuration memory and associated routing circuits                   from the plane of the CMOS transistors and replacing  them with a crossbar network in a layer of metal interconnect above the                   plane of the silicon, the total area of an FPGA can be  decreased by a factor of 10 or more while simultaneously increasing                   the clock frequency and decreasing the power  consumption of the chip (21, 22).

In other words, the same thing, but better.  Memristors have other more specific advantages, from what I gather, if you want to build something like a hardware neural network.  Which I don't, personally.  So I think we might be talking at crossed purposes here.

Do you believe me now? The reason I'm ignoring your hack to try to implement reconfigurable FPGAs using what we have now is that it's sub-optimal compared to memristor-based devices. I hope you agree.

Well of course I believe you, I never doubted that it's possible to make a self-reconfigurable device.  But you would still have to design one.  They have shown that it's possible, but I still don't see that it isn't possible using transistors.  Memristors perhaps simplify the design, but I've still yet to see a detailed description of how this would actually work, functionally.  There is plenty about the strange properties of the memristor as a component.

Everything is sub-optimal.  Current FPGAs are maybe suboptimal by not being tomorrow's technology, but memristor devices are suboptimal for not actually existing yet.  I could go and buy myself a Virtex 6 tomorrow and implement my design on it.  I don't know where you are going to get your memristor-based technology from.  And I don't see how it is a "hack" to implement something interesting or useful on existing hardware.  I'm not proposing the use of undocumented features here.  There is nothing "hacky" about working with what you've got.

[Mrs Beanbag]

This is the best introduction to electronics I've found so far. If you're already familiar with Maxwell's equations it may be covering ground you are already familiar with, but I'll share it just in case:
http://lcamtuf.coredump.cx/electronics/

I'll read that later, it may be "concise" but it's still quite a lot of reading!

A chip that can implement a neural network needs to be able to change its own structure, otherwise it wouldn't be able to 'learn'. It's a specific application of a run-time configurable device.

Indeed, but a neural network isn't programmable in the traditional sense.  Rather, you have to train it, which is a slow process.  Just like you can't retrain a plumber to be a heart surgeon in an afternoon, you can't retrain a GPU neural net to be a sound chip in a nanosecond.  I don't want a chip that learns, I want a chip that does what I tell it; Butlerian Jihad and all that.

Neural Networks are useful and interesting for all kinds of reasons, but it's not the problem I'm trying to solve.

I don't intend to design one. I intend to buy one after they're manufactured. I don't even need to design my own PCB, a reference platform should suffice for a proof of concept. I've got plenty of research to do before I have a chance of implementing the real device, so this delay in availability is not a problem IMO.

Well here's the rub.  But I do intend to design one... well, I intend to idly speculate about one... but if I could put my design on a standard FPGA I could put it on a memristor-based FPGA as well.

The problems that I'm trying to solve are architectural, rather than electronic.  We know it's possible for a cell to reconfigure itself, the problems are:
1) how does a cell know when to reconfigure itself?
2) how does it know what to reconfigure itself as?
3) how does the relevant data get there?

I'm thinking of a scheme based on systolic arrays.

[Mrs Beanbag]

look here
Staf.

Partial reconfiguration is possible, but it's still externally driven (by software running on a CPU).  What I'm trying to devise is some mechanism by which the FPGA itself (or rather, the configuration thereon) would drive its own reconfiguration.  Although if this is already possible in hardware, maybe two FPGAs could help each other out.

[Mrs Beanbag]

Yes, it is quite a bit to read. Hope it's useful to you.

Sadly it's the same story, "this is Ohm's law.  It just is."  It's empirical, there isn't really a derivation.  But never mind.  I've made it Lorentz Covariant and squashed it down to two dimensions (length+time), compared it to V=IZ and... I've got it in terms of Quaternions.

We can write it as V=IZ where Z = sigma_1.R - i sigma_3.X

Well that's kind of neat, but what in Bob's name do sigma_0 and sigma_2 represent?

Still working... I've got an equation for Z as a rank 2 tensor in terms of the current and charge distribution in the device, but it might take a little while to solve.  For resistance it is easy because the current is constant in a straight line.  For inductance we can represent it as current in a spiral (a circle plus a length displacement) and that makes sense.  A capacitor must be current with a dip in the middle (there would be equal current at both ends but with a polarisation of charge in the middle.)  Now are there any other interesting shapes we can bend a wire into?

To me, the answers to those three problems are found in the OS design, which is one subject we haven't talked much about yet. To date, I've not worked on the low level issues you're discussing, but would be interested in exploring the design possibilities with you. Could you tell me what systolic arrays are?

Thought you might be interested in Tabula FPGAs, Mrs Beanbag. Is this hardware in line with what you're looking for?
http://www.popsci.com/technology/article/2011-04/reprogrammable-chips-could-allow-you-update-your-hardware-just-software

Now that's interesting, I guess it's kind of similar in principle (to switch cores in and out) but my idea is to be able to fetch them from off chip, this has a certain number in reserve that it can switch in and out.  I could use that technique as well, I guess.

... So at one end of the system we'll be blurring the lines between hardware and software, and at the other end of the system we'll be blurring the lines between the OS and the applications. If you're interested to learn more about the plans for the OS I'm talking about, please feel free to ask me.

You know this sounds very much like my own idea for an OS from several years back.

[Mrs Beanbag]

Hang on a minute... I've got a Virtex 5 manual sitting on my shelf in here, I should probably have a look at it.

[Mrs Beanbag]

We can dream, can't we?  And I like my dreams to be as detailed as possible.

[Mrs Beanbag]

@Thorham

you know what, me too.  This is something of a paradox for me, because I love to think about solutions to problems such as how to make the fastest computer ever, but I personally have no use whatsoever for the solution...

I used to work in software with a guy who used to tell me there's no point optimising my code because "everyone has 3GHz CPUs and 4Gb of RAM now", grr