Seeing how I've become interested in FPGA computing, I would like to play with this, and seeing how a switch (emulated relay using bits as signals) emulator on a computer shouldn't be too hard to write, I would like to know how easy or difficult such virtual circuitry would be to translate to actual circuitry that can be implemented using an FPGA (or with wires and transistors, or an ASIC, or...)?
Any pointers are appreciated 
Your relay sounds like a passgate. (also called a transmission gate in some circles) In an ASIC you might just put a passgate there, but this implies tristate wires which are frowned upon in modern design practices in terms of design using gates (logic gates I mean, not transistor gates). (be that verilog, vhdl, schematics, whatever, it's all a poor habit to be in unless there is particularly good reason for them) It's frowned upon as it implies the possibility of a floating input somewhere when all drivers on the net are "off"/disconnected. Floating inputs are bad, in that they can do weird things, which can be bad. So tristate busses, like you do see on PCB boards (PCI, Zorro, ISA, etc) are frowned upon inside a chip. Using a passgate can be troublesome in timing analysis. In my FPGA silicon days, we could not plan for timing because of inability to time through passgates. So we just built them, and thigns went as fast as things turned out to work right. It's also difficult to design an FPGA with timing/speed in mind, as what exactly needs to go how fast? You don't know what it will be doing in a customer design, so how do you optimize for that or have a particular goal?
In an FPGA, to do a passgate, you probably controlling a mux to pass the input value out or not. But in not passing the input value out, in an FPGA you probably need to pick an "off value", in that you can't pass a Z (complete disconnect), you have to pass (select) either a 1 or 0 (still connected to something). Proper design methods/habits/whatever need to be used, so rather than design using "relays" as you call them, you need to design using more appropriate elements. And that applies to all digital things inside the chip. (Analog chip design is a whole other world with whole other rules. I've only scratched the surface there as a layout guy, and know nothing of circuit design that we layout guys are given to implement)
