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Author Topic: Using a PC as an accelerator? Had an idea last night....  (Read 10684 times)

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Offline Karlos

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Dr_Righteous wrote:
I've often wondered why no one bothered making an x86 version of the PPC Amiga accelerators. Same concept, different CPU. 680x0 + x86. Call the new multi-tasking kernel "Warp86". :idea:

I'd be all for a PCI card with FPGA custom chips as well, designed for use with WinUAE in a similar fashion to Catweasel (perhaps even incorporating it). This way UAE controls the environment and CPU emulation, but lets the hardware functions be passed to, well, hardware.


Such a design would be totally blighted by endian conversion issues. You'd probably need to use the big-endian memory access tricks they did for amithlon.

Another problem with sticking increasingly fast cpus into a classic is the extreme latency of talking to the original hardware and handling interrupts etc raised by it. Eventually, you will have offloaded so much of the original hardware to your x86 stock kit that as bloodline says you'd wonder what it was your original system was even doing.
int p; // A
 

Offline Karlos

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Re: Using a PC as an accelerator? Had an idea last night....
« Reply #1 on: August 21, 2008, 02:07:29 PM »
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amigaksi wrote:
>Such a design would be totally blighted by endian conversion issues. You'd probably need to use the big-endian memory access tricks they did for amithlon.

But he is suggesting some interface hardware in between to do the CPU signal translation in real-time.



How does this external converter know what size element is being accessed in order to do that?

The CPU core will perform byte/word/long/quad reads and writes on its own caches but the CPU as a whole will perform cache line transfers to/from the main memory. I can't see how any interface in between can have any way of knowing what the data being transferred is in order to to do any swapping. All it will see are long bursts of fixed width accesses.
int p; // A