MiniMig with AGA

[yaqube]

Can you guy's concider to put a RTC on the expansion board if possible ?

Yes, I'm currently working on it.

[yaqube]

is the source code avialable or is MiniMig offcially non-GPL by now?

The source code will be available when the boards are made.

[yaqube]

The thing about laptops is to get everything to fit inside a small box and get screen + keyboard + mousepad to align properly.

Sometimes I have an urge to gut a netbook and make a replacement mainboard with an FPGA

[yaqube]

I haven't got the Amiga data with me, but if I remember correctly the keyboard is 5V, gnd and serial clock/data - so you can probably wire it up to the PS2 connector and modify the interface block which handles mouse/kb to also handle the Amiga protocol.

In case of any A600 or A1200 the keyboard is connected with a flat cable to the MCU on the mainboard. These keyboards are totally passive (simple switch matrix) but require a lot of I/O lines to handle.

[yaqube]

Is the onboard RAM shared Chip/Fast RAM, all Chip RAM (but faster than the Chip RAM in a Classic Amiga), or configured Chip or Fast RAM via jumpers or software?

The SDRAM is shared as follows:

0.5 MB for ROM (will be expanded to 2 MB)
2 MB for Chip RAM
1.5 MB for Slow RAM
8 MB for Fast RAM (Zorro II area)
48 MB for EXTRA Chip RAM (may also be configured as Fast RAM)

The memory is configured by the OSD menu.

[yaqube]

I assume the softcore 68000 is using 32-bit adress bus?

Your assumption is correct. Otherwise there was no support for more than 16 MB of RAM.

[yaqube]

No, the TG68 does not support 68020 opcode.  It has some 68020 features like the 32 bits address bus and pack/unpack instructions but it has not a 32 bits data bus and does not support new address modes.

That's not true. The newest TG68 core already supports all 020+ address modes and some 020+ specific instructions. It's still a work in progress and in the future it will be fully compatible with the 020 instruction set.

[yaqube]

Is it the Mikej's project (the 68k pipelined implementation)?

No. Mike is working on a cycle exact version of the plain 68000. The work is far from complete.

So now your version supports the full extension word format.

It's not my version. All work has been done by Tobias. I'm only testing it.

Is it compatible with one byte aligned data?

Not yet.

Have you added a 68020's style cache to save some bus cycles?

It's on the way. Should be done soon. The plan is to get double 4-way set associative (so like a 040 or 060) burst enabled snooping cache.

[yaqube]

How much work/time is remaining on the softcore 68020 before it's workable?

The answer is unknown (or maybe the answer is 42 ).

Maybe 020 software doesn't really use that many 020 specific instructions?

It strictly depends on the software. It's already possible to run some 020 specific programs.

Hope MMU / FPU softcores follows

Unfortunately there is no such plan.

[yaqube]

How much room would there be left on the FPGA when the minimig core is loaded?

The AGA Minimig core with the TG68.C V4.0 (partial 020 compatibility) takes about 60% of the FPGA.

Is there enough space for minimig + an extra cpu softcore (or two)?

The aforementioned CPU core takes about 20% of the FPGA.

[yaqube]

How about a new youtube video anytime soon?

I'm still thinking about a new one. But cannot promise that it will be graphics oriented.

[yaqube]

How is the TG68.C V4.0 in terms of performance on the Xilinx XC3S1600E?

SysInfo reports 3.29 MIPS and speed 2.59 times higher than a stock A1200.

The CPU core is clocked at 14.18 MHz but it's being slowed down to 7.09 MHz whenever it wants to access memory bus (and it wants it almost all the time so only multi-cycle instructions like multiplication, division and shifts/rotations operate any faster). It will change when there is a cache implemented.

Also the CPU core has only 16-bit wide data bus so the performance could be improved in the future by implementing direct long-word transfers but it entirely depends on Tobias.

[yaqube]

The newest Minimig AGA core has just got a 16-bit AHI support for the Replay's Audio DAC.
The playback is DMA driven with very versatile sampling frequency selection.
Some other improvements are planned for the future.

[yaqube]

That's good news! I didn't even know that the Replay had a different audio mechanism. Does it mix with the standard Amiga audio output?

The Replay is equipped with 24-bit Audio DAC (capable of 192 kHz sampling rate) but right now only 16-bit precision is used. It may change when the CPU core is fast enough to mix channels in the Hi-Fi mode with reasonable rate but I'm rather sceptical if it's of any use as the noise floor of the board isn't as low.

Does it mix with the standard Amiga audio output?

The standard Amiga audio output is mixed with the 16-bit AHI output.

Great, now its time to hack a Picasso96 gfx driver!!!  

I think I have enough information to write a new one from scratch. Only time is the limit.

[yaqube]

Can the DAC also do sampling in? Of course that would require a Mic input...

No, a DAC connot sample incoming signal. That's the task for an ADC (or a codec which integrates DACs and ADCs).

[yaqube]

Any link that describe the "Replay" hardware in detail?

Only schematics available.