Update PIC on Minimig

[boing4000]

Today Vesalia insure me to swap the PIC with another one contain tiny bootloader, also for all their minimig customers :-)
They are still waiting for a response from ACube but will do this exchange anyway.

[boing4000]

Im also happy about this reaction and service. No matter if this exchange will take some days, minimig is still operating well with this (static) older firmware version.

When I have the new PIC, I will try to place the adf files into a subfolder (\adf) to make more images accessable as in main directory.

[boing4000]

Fingers wrote:
I noticed that AmigaKit stock supply has been delayed "due to firmware upgrade".

Maybe this means the new ones will be update capable?

I hope :-)

PZ.

I also hope that. Vesalia AND ACube ensure me that the new PIC do have the tiny bootloader inside, also the current firmware version. So this PIC should work fine and can be updated via RS232 and PC

[boing4000]

If you're looking forward to SD write access I'd keep an eye on this Minimig development forum:
http://gamesource.groups.yahoo.com/group/minimigtg68/
There is a beta version of adf write access being discussed now, but please note that it would need extra work to be ported to Minimig v1.1.

I also asked for that and this "Minimig" is not based on a PIC but on a Z80 CPU to init the (Altera) FPGA and Floppy emulation. So this kind of code and write support will not work on the "original" minimig we have.

Perhaps I am able to test and try something out with the new PIC. There are some ideas for writing support and storing .adf files somewhere else for a higher amount of files.

[boing4000]

Hi TheDaddy,

JTAG is a basic communication with "intelligent" chips. some mobile CPU also have a JTAG interface. more to find with google search for the term.

Spare I/O is a user programable Input/Output part of the FPGA. It possible to create a jumper settings e.g. NoFastMem or in the NTSC-patch for bilinear video filtering. Also possible to program real data in/output.
ps: Closing pin 9+10 (jumper next to the FPGA) will disable the floppy simulation in the PIC.

FPGA/MCU is to select where the RS232 data will send FROM the minimig TO the RS232. Set to FPGA allow "Amiga" to use RS232, set to MCU allow PIC to use RS232 (Firmware update as in the thread name).

15/31KHz should be self-explanatory, it will set the VGA connector H-Sync signal to the selected frequence, in fact this is the onboard scandoubler of the Amiga3000 inside the FPGA to use a VGA compatible monitor/TFT.

[boing4000]

For normal use you dont need to switch or access this jumpers or pins. The only one could be "15/31KHz" to switch between PAL/NTSC and VGA output.
All other jumpers are mostly static. JTAG is only necessary for raw testing or programming the FPGA without (working) PIC.

So you can set or leave the jumpers as it works for you and close the case
Access to SD/MMC card, Reset and maybe Menu should still be possible.

[boing4000]

Dennis used a PICKit-2 Programmer for his minimig. I dont know if this demo board can do the same job.
In pictures it looks like a programmer using USB connection, but Im not sure!

[boing4000]

This other system must be recompiled to a Spartan-3 FPGA core and has to be adapted to the board layout. It should be possible to run every other thing.
Simulating an Atari-ST is also possible, this could additional use the onboard 68000 and dont need to be simulate in FPGA :-)

I found some Spartan-3 code that simulates an old Pac-Man gaming machine, this should work on the minimig after pin-adapting the VHDL source.

Minimig is open-hardware if you want it this way.
Unfortunately I still dont know how to (re)compile, I would test much more and try to fix some bugs if I could.

[boing4000]

TheDaddy, should this be a new kind of minimig or "just" a new case?
If it is a complete new design and board, you are welcome to start a separate thread for it :-)

When I get my new PIC with tiny bootloader inside, I want to start testing and adding some features (e.g. write support in adf files) for the original minimig (Dennis' board).
A new design will make it impossible to test the same files because some wires or codes would be changed.

For other systems running "on" the minimig, the FPGA needs to know its hardware. Atari-ST custom chips or maybe Amstard CPC or C64 hardware has to be loaded into the FPGA via existing PIC or JTAG.
The PIC does not care what kind of "hardware" is going to upload into the FPGA. Once uploaded the FPGA will start its work and silulate/act as the loaded system.
Therefor the simulated system should "know" about the environment as the "Amiga" does. The same PIC also can provide .adf files for Atari-disk-files or big-D64 "adf" files for C64.

This is all theory now, but it can be done with knowledge of the emulated system and its behavior in accessing drives or external ports.

[boing4000]

It is also possibe to change the PIC/FPGA core and let the OSD be controlled by joystick. Pressing the menu button will display/hide OSD then joy2 up/down/fire to move and select.
This will make it more easy and dont require a keyboard. If in menu the joystick input will also affect the Amiga/Hostsystem (Game) or could be disabled in active OSD.

Almost everything is possible and practicable, the whole Minimig is programming hardware to act/react as it should.

But lets come back to reality... :-) nice to speculate all this, still the real minimig needs some alignment and "bug fixing" to be a real A500.

First the blitter problem should be solved, many games act like running on an ECS Amiga (with kick 2.x), showing the same graphics error.
I will compare this in UAE using debug mode, checking copperlist and blitter access to find the problem.
somebody else could recompile the FPGA core and lets see what we can do.

[boing4000]

Please try to write only the tiny bootloader file in PICs flash space. then you are able to update the actually pic firmware via minimigs RS232 port. thats the propper way.

[boing4000]

You are welcome. The next days I will receive the new PIC from my dealer containing tiny bootloader and the current firmware.
Then I will try to make adf files writeable.

[boing4000]

Hello,

I finished a new FPGA core with some features and changes:
- slowmem can be deactivated via jumper (Spare-I/O pin 3-4) as in the real A500 (see included picture).
- power led will turn completely off, no dimming (as in my first A500 rev. 5).
- OSD color changed to design "nightshift".
Download

Since there was no source code for PAL60 patch, I could not include it.
This firmware still offer 15/31KHz @ 50Hz display mode.

Have fun :-)

[boing4000]

Today the new PIC with current (Dennis) firmware arrived here! This PIC also contain tiny bootloader so I am able to modify the firmware and re-flash via RS232.
Write support is my first priority. Also storing adf files in a sub folder, this should be more simple but I have to compile the C sources and generate the necessary .hex file.

Maybe I can realize my own PAL60 patch, but certainly without that additional video filtering. Too bad...

I'll let you know about any success.

[boing4000]

Im doing the best I can... Until now VHDL is still a bit strange to me. In time and practice it will become easier. (as writing in english ;-) )

@alexh
you DONT need to remind me, I've already released a new core firmware with (comment) source code.
Also I was unhappy myself due to previous release with binary only.
In fact PAL60 is unnecessary to myself, its all for you who need it.

[boing4000]

@alexh

In my understanding VHDL is Verilog. There is also a HDL programming language. Xilinx Webpack can do both.

If you take a closer look to the .zip file, you will find this directory structure:

Minimig-29-05-2008
drwxr-xr-x 2 0 0 4,0K 29. Mai 02:24 build
-rwxr-xr-x 1 0 0  35K 22. Jul 2007  gpl.txt
-rwxr-xr-x 1 0 0  18K 29. Mai 14:03 Jumper.jpg
-rwxr-xr-x 1 0 0  320 29. Mai 14:34 readme_29-05-2008.txt
drwxr-xr-x 2 0 0 4,0K 29. Mai 14:30 source

So you can find the full FPGA sources AND binary inside the zip file.