http://www.zachtronicsindustries.com/kohctpyktop/kohctpyktop.htm
This is great fun. Unfortunately for me, I'm stuck on the dual set-reset latch. I can't get the verification past 95%, so it fails. I'm using a dual NOR based design for each latch to minimise the number of gates (as gate delay is a factor), but my design still sucks as Q0 and Q1 basically oscillate until the system is initialised with an input. After that, the system works but there is up to a 2 gate delay in responding to the set or reset.
I say, use a microcontroler to sample the inputs and then generate the correct outputs... What!? I'm a software guy...
