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Author Topic: Zorro 3 Bus Speed  (Read 10435 times)

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Offline trekiejTopic starter

Zorro 3 Bus Speed
« on: March 05, 2010, 11:01:11 PM »
Wikipedia says it is 150 MB/sec, I assume theoretical.
What do you think?
Did any card ever use that close to that much bandwidth?

http://en.wikipedia.org/wiki/List_of_device_bandwidths
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Offline trekiejTopic starter

Re: Zorro 3 Bus Speed
« Reply #1 on: March 10, 2010, 12:01:01 AM »
cool
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Offline trekiejTopic starter

Re: Zorro 3 Bus Speed
« Reply #2 on: March 10, 2010, 11:28:36 PM »
One of the parts of the Asynchronous 68000 bust transfer is the wait states that are added while waiting for /DTACK. /DTACK can be created by a counter that is activated by /AS which is active low Address Strobe. The clock counts for a number of cycles then applies /DTACK.
What is also interesting is the circuits used to interface SDRAM. The address gets multiplexed by a counter to do the two sets of address reads, that is from the cpu to sdram. This is done after /AS and before /DTACK.
« Last Edit: March 10, 2010, 11:30:12 PM by trekiej »
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Offline trekiejTopic starter

Re: Zorro 3 Bus Speed
« Reply #3 on: March 11, 2010, 04:06:19 AM »
What is nice about Asynchronous timing is that the cards can work at different speeds.
*
DMA, and then CPU accessing the the PIC's memory maybe where the clock comes in to play, to speculate.
« Last Edit: March 11, 2010, 04:09:29 AM by trekiej »
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Offline trekiejTopic starter

Re: Zorro 3 Bus Speed
« Reply #4 on: March 11, 2010, 07:19:59 PM »
@ tnt23
What I am refering to is that a memory chip does not or appear to not have that ability but a PIC ( add-on card )does/could. I do not know of any SDRAM chips that have ability, the author did not specify that.

The author shows a counter that counts to a specified amount of time and aserts a /DTACK. The counter is started by /AS. It appears that it does not guarantee that data has made it safely.

I believe that there is a situation after so many wait-states that under the right circumstances the read/write can be repeated. That is something I have to look up.

I am not trying to say that the wait is arbitrary. Looking at the timing diagram, I believe 3 things can happen, success, bus error, or repeat.
Sure, from /AS to /DTACK is X number of cycles for which this would all happpen.

I hope this clears up what I mean.
« Last Edit: March 11, 2010, 07:30:57 PM by trekiej »
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Offline trekiejTopic starter

Re: Zorro 3 Bus Speed
« Reply #5 on: March 12, 2010, 02:54:56 PM »
No problem, I need to further investigate where the clock comes in to play.
Before studying the 68000 the clock is/was used to time everthing, it seems, at least in appearance, that one could get away with using R/W and ENable lines for timing.
That is me speculating.
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Offline trekiejTopic starter

Re: Zorro 3 Bus Speed
« Reply #6 on: March 12, 2010, 10:33:17 PM »
@Zac67
You know more about that than I do, humble grin.
As far as I can tell, and to speculate, to slow the system down to get more performance reminds me of an accordion effect.
The accordion effect is like a string of cars going over a speed bump. They get bunched up at the speed bump. Then they pick after the speed bump. It is as fast as the slowest chip or function.
IMHO, lol
« Last Edit: March 12, 2010, 10:35:16 PM by trekiej »
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Offline trekiejTopic starter

Re: Zorro 3 Bus Speed
« Reply #7 on: April 11, 2010, 07:32:03 AM »
I was wandering if I should answer the above post.
Here goes, I do not buy PC hardware except for those rare times I buy PC hardware.
That is how it sounds.
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