FPGA Replay Board

[espskog]

One other thing.
The Replay board has a set of standad IO modules to talk to the ARM CPU, input devices, DRAM, audio and video etc. One of the reasons to modify and modernize the Amiga softcore so it can use my blocks.
 
This results in a design which is actually a bit easier to port to other hardware.
These blocks are also used by the other softcores making it a lot easier to get new stuff up and running.
 
Mike

Do you have some info on whether there is or will be a compatible C64 core that can read/write the SDCard ?
 
Espen

[billt]

I guess it must be the developers preference. "Easier to maintain" probably means "Easier for me to read & change". Heh Verilog ain't that bad once you get used to it

I'd say it's just developer preference. In my case, Easier to maintain would mean I'd convert the CPU softcore to Verilog. VHDL is IMHO icky and gross but I like Verilog.

But having everything in a single language means one could simulate with an open-source simulator (either Icarus, Verilator or GHDL).

[freqmax]

Asfaik some logic can only be expressed in VHDL and not Verilog. Especially in regards to flank triggering and dependencies. Thoe Verilog is easier and VHDL is cumbersome.

You can all thank US Department of Defense for VHDL being based on ADA. Rather than start with a clean sheet and design a hardware description language based on its own merit. Where definition of states, dependencies, parallism, etc would be central.
It should be said that hadn't DoD put down the foot there would been a forrest of different HDL languages from each manufacturer all incompatible with eachother..

[alexh]

Verilog is easier and VHDL is cumbersome.

In Verilog is too flexible for it's own good. It is very easy to make accidental syntactical mistakes which actually compile (and thus introduce bugs which are difficult to find) but in VHDL it is practically impossible.

[mikej]

Do you have some info on whether there is or will be a compatible C64 core that can read/write the SDCard ?
 
Espen

Yes, I have a working C64 core but not an accurate SID at the moment.
Work is on-going reverse engineering the analog part of the chip at the moment (see visual6502.org for details of how it is done)

[mikej]

The big advantage for me is the powerful simulation environment and the easy I can create records and complex data type to pass info around. You can do this all in Verilog, but it is a bit low level for me.

For example, in my Amiga video timing generator file is a bit longer, but easier to read, understand and maintain - in my opinion.
/Mike

[Darrin]

Yes, I have a working C64 core but not an accurate SID at the moment.
Work is on-going reverse engineering the analog part of the chip at the moment (see visual6502.org for details of how it is done)

I thought that there was a new C-One C64 core available with working SID emulation.

[mikej]

yes, but last time I checked the c-one was bound up in some stupid non-disclosure deal which meant the source code (even though it is based on FPGA-64) cannot be distributed.

http://www.syntiac.com/fpga64.html

Daft.

So, we'll write our own SID and release it with an open license for the Replay board.

SID die shots:
http://mail.lipsia.de/~enigma/neu/6581.html
http://oms.wmhost.com/misc/

I'll be checking the binaries for other boards to see if any of our code is used....
/Mike

[Darrin]

yes, but last time I checked the c-one was bound up in some stupid non-disclosure deal which meant the source code (even though it is based on FPGA-64) cannot be distributed.

http://www.syntiac.com/fpga64.html

Daft.

So, we'll write our own SID and release it with an open license for the Replay board.

SID die shots:
http://mail.lipsia.de/~enigma/neu/6581.html
http://oms.wmhost.com/misc/

I'll be checking the binaries for other boards to see if any of our code is used....
/Mike

Damn, that is a waste.

Even as a C-One owner I have a hard (almost impossible) time trying to find out what is going on (if anything) with the core developments.  The Amiga core for the C-One seems to work for some people and is buggy as hell for others (like me).

The net result is that I power it up for a while, get frustrated and then mothball it for 6 months, which is a real shame as the potential for it is huge (actual C64/VIC-20 serial port, c64 cartridge port, printer port, IDE, A1200 clock port, etc).

My last attempt resulted in me finally getting the Amiga sound to work correctly, but a real SID fitted to the board (jumpers configured correctly) produced a single tone and became hot enough to fry an egg on in seconds.

Now if only the joystick detection on the new C-One Amiga core worked correctly like it did on the old one...

[icbrkr]

I put the C-One under my desk and occasionally bring it out when someone posts a 'fix' to a mailing list, or releases a new core. I get excited that it might actually work since I paid... oh what $400 for it and have had it since 2005 ...  but no, it still doesn't do what I want it to do, I get discouraged, and I put it back underneath the desk.

[Darrin]

I put the C-One under my desk and occasionally bring it out when someone posts a 'fix' to a mailing list, or releases a new core. I get excited that it might actually work since I paid... oh what $400 for it and have had it since 2005 ...  but no, it still doesn't do what I want it to do, I get discouraged, and I put it back underneath the desk.

Sounds familiar.  

On the plus side, the C64 and VIC-20 screens look fantastic via the VGA connector.  

[alexh]

I can create records to pass info around.

ARGH! Please tell me you don't use record types on entity ports?

Next you'll be using arrays of records of enumerated types (guaranteed to feck up almost any FPGA synthesis tool!)

[mikej]

ARGH! Please tell me you don't use record types on entity ports?

Next you'll be using arrays of records of enumerated types (guaranteed to feck up almost any FPGA synthesis tool!)

sometimes, although I try and minimize it.
The synthesis tools are pretty good at it now, only get problems occasionally with overloaded functions dealing with complex record types ....
You should see what we get up to in the ASICs..
/Mike

[espskog]

Yes, I have a working C64 core but not an accurate SID at the moment.
Work is on-going reverse engineering the analog part of the chip at the moment (see visual6502.org for details of how it is done)

Great news. Is the SD card access also in place already for loading of D64 files just like ADF's on the MiniMig ?

And, will SID feature filter effects ?


Espen

[icbrkr]

Sounds familiar.  

On the plus side, the C64 and VIC-20 screens look fantastic via the VGA connector.  

Yep

All I ever wanted out of the thing was to:

- Use the IEC port with real drives (fast loaders working properly)
- Use the 3.5" floppy as a 1581
- Use the onboard SID as ... well a SID
- Use the CF card to load D64s
- Use the IDE as... well a hard drive.  CMD maybe?
- Use the extra RAM on there as maybe a 1750

All the 'other stuff' like expanded VIC or whatnot can come later.

In other words, I'd like to use it as my current 128D setup is now.  But what I get is a C64 that loads games with graphical glitches, crashing fast loaders, and unused features.  It's easier/cheaper to use a real C64.

[freqmax]

mikej, As you seem to work with ASIC design. Do you think it's realisable to create a design consisting of a plain matrix of CLB elements? as way to an open source FPGA chip?