Enter the DRAGON

[SamuraiCrow]

3.9

[klesterjr]

> Fair warning: first person to talk about RISC gets slapped.

You asked the question and then refused to listen to the answer!

RISC is exactly what it says -- a REDUCED instruction set -- if the instructions aren't in the processor, then they need to be in the running process (hence programs are larger).
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I'll be curious to see what the "kids" have to say about the price (since $500 is WAY too much for a MOTHERBOARD -- $350 ought to be WAY too much for an accelerator!)
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[Dan]

RISC is going to end up as a new CISC. :lol:
Isn´t this how all designs work whether programs, cars or cpus?
"We are going to make it slim and elegant" then along comes some other buggers and adds a lot off "useful" functions to improve things. :-P

[EntilZha]

I would much rather run tight 680X0 code than PPC code.

Yes, sure... especially since the bloated PPC code runs at a multiple of the speed of the tight 68k code...

I wonder how much bigger the core exec/kernel OS of the PPC version of AmigaOS is

Exec V50 is written in C, while the original exec was written in 68k assembly... This makes for a lot more difference than 68k vs. PPC code...

If you need to know, the current Exec code is about 300 KB. Of course, a big chunk of this is the emulator (about 50 K). The original exec was some 20 K of code.

Between 3.9 and 4.0 there shouldn't be many changes that would account for a much larger size, other than the PPC not being as code-efficient a chip as we were lead to believe.

What a nonsense.

Fair warning: first person to talk about RISC gets slapped.

Just goes to show that you don't have a clue about what you're talking.

What's even more troubling is the off-the-shelf card approach we see for the video-graphics subsystems on the new "Amigas" or Amiga-like contenders.

LOL, now that was a good one...

Shawn, is that you ?  :-D

[Piru]

Weren't the missing instruction sets added to the later model coldfires?

Some, but tons are still missing.

There's some old doc I wrote about this.

[Piru]

can load ppc software using the coldfire.library

What coldfire.library? What's this?

Anyway, ColdFire is not PPC CPU, so that should answer your question.

[Rogue]

Have any of you seen the PPC instuction set?

The PowerPC is design with a fixed-width instruction set. That makes instruction fetching and decoding much easier than on the 680x0. The direct consequence is that there are 1.4 Ghz PowerPC CPU's while the 68060 topped at around 100 Mhz. That's a factor 14, mind you.

Between 3.9 and 4.0 there shouldn't be many changes that would account for a much larger size, other than the PPC not being as code-efficient a chip as we were lead to believe.

Apart from a virtual memory system, lots of new functions, a complete 68k emulator, and being written in C instead of assembler...

If the ColdFire supports most of the common 680X0 instructions (and addressing modes) and the net effect is that it runs several times faster than a 68060, then i'm interested

Only that a PPC is several times faster than several times 68060... Oh well.

What's even more troubling is the off-the-shelf card approach we see for the video-graphics subsystems on the new "Amigas" or Amiga-like contenders. Why have none of them thought to include a module to add elegant Amiga videographic features to the gfx cards they plan to slap in?

LOL! That was a good one, really :-)

What "elegant Amiga videographic feature" are you referring to? The 8 bitplanes maximum? The bandwidth requirements that make chip ram access almost impossible with high-res modes? Planar displays that require you to split a single pixel across 8 bits? The ability to run 8 bit video modes only?

If the core AGA features (or an extension) could be overlaid with existing AGP gfx systems, that would be very good indeed.

"Core AGA features" are as outdated as they come. Hardware sprites? They are so limited that I hardly know a game that would ever have used them except for the mouse pointer (but then, the Radeon can have a true-color mouse pointer).

If only we had all pooled our money some 5 years ago to fund Mick Tinker and Jeri Ellsworth to work together on that one subsystem. Then these new Amiga-wannabe machines would be more than just PPC boxes with AmigaOS and Amiga hardware emulators

No offence to these undoubtedly very talented people, but do you honestly believe that a handful of people could at all beat multi-billion dollar companies like nVidia or ATI or Matrox?

And could you cram this and an A1200 moboard into an A500 case?

At 266 MHz I'd wager to say you'd run into a heat problem. Also, I have my doubts that a standard A1200 power supply can handle that, especially if it has an AGP slot and you would want to put one of those dispiseful ATI Radeon's into it (after you grow tired of HAM8, that is ;-) )

[DaNi]

the coldfire.library is for enable all coldfire datas/caches & emulated missing instructions found on 680x0 (68060.library do this too for enable all without this library, 060 work bad and slow). I think oli_hd have this library for the coldfusion project. 68040.library dummy -> 68060.library dummy -> coldfire.library

=)

[Waccoon]

Boing:  I got an PPC Assembly language book and was mortified.

Why the hell do you WANT to code in assembly?!  All RISC CPUs have arcane instruction sets because we have compilers.

The world is moving to things like Java and PHP, my friend.  The age of assembly is over.  Deal with it.

Boing:  Why have none of them thought to include a module to add elegant Amiga videographic features to the gfx cards they plan to slap in?

Foot the bill if you want a custom chip made.

Also, bitplanes are useless for most things these days.  You'd be using brand new chunky modes for everything, and thus the whole old blitter architecture would have to be tossed out.  What is there to salvage?

"Elegant" is a relative thing.  The Amiga was elegant back when most things ran with 16-32 colors.  Today things are different, and the Amiga architecture (and OS) is anything but elegant and flexible enough for today's tasks.

Rogue:  Hardware sprites?

Actually, I'd like to see that, again.  Having graphics independent of the refresh rate of your monitor is a very, very handly thing to rid your games and stuff from flicker.

[Georg]

Hardware sprites? They are so limited that I hardly know a game that would ever have used them except for the mouse pointer

They were used a lot in the good/best games. Mostly for the player sprite. But also for player bullets, score display and sometimes even for additional parallax layer. In Battle Squadron for example the (max.) two player sprites plus all the bullets shot by them plus the score display was all done with hw sprites. Some of these games
(others incl. Turrican 3, Lionheart, Shadow of the Beast) would have looked terrible if there had not been hw sprites. Because with hw parallax scrolling you (on OCS/ECS) only had 7 real colors in the foreground and 8 real colors in the background.

[Brian]

I'd love to see one of these for the A4000 so I could jam it into my spare A4000D. It won't replace my A4000T/PCI/PPC machine though and I'm not going to do another A1200T project... there's a reason I'm selling my A1200T/Zorro/PPC machine. The A1200 (original desctop) mod project I have is all I need on that front.

[Damion]

erm.. maybe I'm stupid but does it have sdram or ddrm ram?

DDR is a type of SDRAM.

 Fair warning: first person to talk about RISC gets slapped.

Just goes to show that you don't have a clue about what you're talking.

I think his point however is that PPC's often have nearly as many (or more) instructions as their x86 counterparts, hence making the "RISC" moniker a bit silly. Anyways "CISC" and "RISC" (as an "absolute" label) are bad ways to define modern processors, unless you're a glutton for market-speak...

[PulsatingQuasar]

MCF5475 Features
V4e ColdFire core with MMU, dual precision FPU and EMAC - delivering up to 410 (Dhrystone 2.1) MIPS at 266 MHz
32 KB I-Cache, 32 KB D-Cache
32 KB on-chip system SRAM
Four 32-bit timers, two 32-bit slice timers, one watchdog timer
Hardware-acceleration encryption (DES, 3DES, RC4, AES, MD5, SHA-1, RNG)
32-bit 133 MHz DDR/SDR-SDRAM Controller
1.5V core, 2.5V DDR, 3.3V I/O voltages
Connectivity Functionality:

Two 10/100 Fast Ethernet Controllers (FECs)
USB 2.0 high speed device with integrated PHY
32-bit v2.2 PCI interface; 33/66 MHz; five external masters
DSPI - SPI with DMA capability
I2C interface
16-channel DMA controller


I wonder which 68K instructions are missing and how often they are used? Nice specs though.

EDIT - from the manual.

The ColdFire instruction set is a simplified version of the M68000 instruction set. The removed instructions include BCD, bit field, logical rotate, decrement and branch, and integer multiply with a 64-bit result.

How often are these used?

The manual does note many differences with the 68000 but also gives additions and tips on how to use the missing CPU/FPU instructions.

[x56h34]

We'll see if Dragon comes out. I say it does look very attractive, however we'll all have to see it to believe it. :-)

It would be a cool expansion to own, as far as classic hardware expansions go, however who knows how compatible the on-board ColdFire CPU would be... ? :-?

[Animagic]

I dont know much about cpus but PulsatingQuasar was the only one that had a really cool and usefull post

[PulsatingQuasar]

I'm beginning to speculate here but this 32 KB on-chip system SRAM could be used for software to add the missing 68K instructions. I don't know if it's possible but it would in theory be a nice place to do that.

I saw several places in the manual where they talked about the differences between the 68K and the Coldfire and how to do things alternatively when porting source to the coldfire.

Maybe the developer kit from Freescale had allready source to implement all the missing functions of the 68K as a service to industrial companies looking for a quick fix to replace their old 68K stuff. I mean, the 68K might still be in use in the industry.

For an anounced date of january this hardware must actually be already finished. It's real release data would then be dependent on the delivery in quantaties of that coldfire.

Keeping an eye out for this hardware.