Welcome, Guest. Please login or register.

Author Topic: Minimig PCB run - interest thread  (Read 98936 times)

Description:

0 Members and 1 Guest are viewing this topic.

Offline Belial6

  • Hero Member
  • *****
  • Join Date: Mar 2002
  • Posts: 568
    • Show only replies by Belial6
    • http://www.glasshead.net
Re: Minimig PCB run - interest thread
« Reply #434 from previous page: August 25, 2007, 01:19:19 AM »
Hardfile support would be great, but that should be able to be done without any hardware changes, right?

Now that I am on the list for a 1.1 board, I can indulge in a little future dreaming.  I don't have the board yet, so only a little dreaming....

Of all the things people want for v1.2+, the one that I think would be the biggest benefit would be adding a USB port.  Almost any hardware can be had to run off of a USB bus.  Everything from CD drives, to hard drive, to mice, to video capture cards.  It might not be the best interface for any particular piece of hardware, but it is the most... universal.  With a USB port, drivers become the only problem to add new hardware to the MiniMig.

I'm not saying that in the long run, other interfaces wouldn't be great.  The more the merrier after all, but given the jump start that I expect the MiniMig to give to the hobby, USB would bring the most benefit with the least effort.

The second biggest boost for our hobby would be getting AROS fully running, and compatible enough to run most Amiga software.
 

Offline koaftder

  • Hero Member
  • *****
  • Join Date: Apr 2004
  • Posts: 2116
    • Show only replies by koaftder
    • http://koft.net
Re: Minimig PCB run - interest thread
« Reply #435 on: August 25, 2007, 02:40:12 AM »
Hardware isn't the main issue with usb, thats the easy part. The difficult part is the software. You better get crackin on that usb stack. I know I wouldn't touch it with a 10 foot pole. I've done enough usb development to know better.
 

Offline freqmax

  • Hero Member
  • *****
  • Join Date: Mar 2006
  • Posts: 2179
    • Show only replies by freqmax
Re: Minimig PCB run - interest thread
« Reply #436 on: August 25, 2007, 03:41:50 AM »
Is /FPGA_SEL2 unused ..?
I can't find any use of it in either the FPGA or the MCU firmware.
 

Offline alexh

  • Hero Member
  • *****
  • Join Date: Apr 2005
  • Posts: 3645
    • Show only replies by alexh
    • http://thalion.atari.org
Re: Minimig PCB run - interest thread
« Reply #437 on: August 25, 2007, 11:19:17 AM »
Quote

Belial6 wrote:
Of all the things people want for v1.2+, the one that I think would be the biggest benefit would be adding a USB port.

Probably time to end this now. There will never be a USB host for a 7MHz 68000 with 1.5Mbytes of RAM. The USB software stack is too demanding.
 

Offline 1NOM155

  • Full Member
  • ***
  • Join Date: Jul 2006
  • Posts: 184
    • Show only replies by 1NOM155
Re: Minimig PCB run - interest thread
« Reply #438 on: August 25, 2007, 09:49:34 PM »
even if USB 1.0???

what is the requests to have a USB ports working nice?
3 x Amiga 500 REV. 6A, ROM 1,3 v34.5 (1991) (All Working)
1 x Amiga 600 REV. 1.5, ROM 2,05 v37.300 (1991) (Stand-by for install a Toshiba HDD2718, 2167MB)
----------------
WTB Amiga 1200 or  Amiga 3000 D & T or 4000 D & T.
Any one to sell to Europe?
 

Offline alexh

  • Hero Member
  • *****
  • Join Date: Apr 2005
  • Posts: 3645
    • Show only replies by alexh
    • http://thalion.atari.org
Re: Minimig PCB run - interest thread
« Reply #439 on: August 25, 2007, 11:38:50 PM »
Quote

1NOM155 wrote:
even if USB 1.0???

Yes, even USB 1.0 or 2.0 Full Speed. The software memory and processing overhead is about the same for both.
 

Offline arnljot

Re: Minimig PCB run - interest thread
« Reply #440 on: August 26, 2007, 01:16:21 AM »
Quote

alexh wrote:
Probably time to end this now. There will never be a USB host for a 7MHz 68000 with 1.5Mbytes of RAM. The USB software stack is too demanding.


I agree with some notes of reservation: The FPGA has some powers of it's own, and it's two 8MB banks in the 1.1hack, all though it's 1.5Mbytes available to the miggy running.

But I think that we have to focus on two things:
One team should focus on core and firmware (adding more features from UAE and removing bugs). And one team focus on the hardware. DVI/HDMI connectors, push pop memorycard slot. Upgraded CPU? I dunno, I'm not really capable of saying what is, and what is not possible within the minimig hardware design confinements.

Dennis van Weeren states on his homepage:
Quote

Dennis wrote:
Future
What does the future hold for Minimig? I don't know. My hope is that due to the GNU public license people will debug it, expand it and generally make it better. What I would like to see first is the implementation of some form of harddisk support, ethernet support and offcourse a debugged sprite engine :-). It would also be nice if the verilog sources of Minimig would make it into a sourceforge project. I could really need some help there. And the rest? Only time will tell!


I think people with the skills should take his word for it. Structure the firmware code in an open accessible basis as an sourceforge project, and refine the hardware on openciricuts.com. Dennis should head the hardware, and someone else with UAE and lowlevel programming should head the software part.

Right now it seems to me that we (the users) are screaming at them like a pack of hungry dogs for kits, features and stuff, and to me it doesn't seem like there is one unified coordinated effort to help dennis out here to handle the horde of hungry amigians...

So this is what I think could help:
1) Split the project into two under one umbrella.
- Minimig Hardware
- Minimig firmware
2) The umbrella project should (third toplevel project)
- Handle feature request, bug reports and coordinate effort from "third parties"
- Organize bounties:
-- Firmware coding bounties
-- Hardware design bounties
-- Hardware manufacturing bounties (the minimig shop?)

This might all sound very ambitious or negative about all the good and valuable effort a lot of people are doing right now.

But I think that a lof of best practices from the open source project management world could be employed here. It would delay some of the quick wins that we might see in the near future (10 assembled boards ie). But I think that after a while when a project organization is working, that a lot more people could benefit a h*** of a lot more...

Maybe I'm sticking my neck out here now and ramble and rant... But I hope that some people with the right skills read this and agree, and organize the right people.
A posting a day keeps the sanity away...
http://www.arnljot.com
 

Offline jkonstan

  • Full Member
  • ***
  • Join Date: Dec 2005
  • Posts: 243
    • Show only replies by jkonstan
Re: Minimig PCB run - interest thread
« Reply #441 on: August 26, 2007, 01:55:37 AM »
Quote

arnljot wrote:
Quote


So this is what I think could help:
1) Split the project into two under one umbrella.
- Minimig Hardware
- Minimig firmware
2) The umbrella project should (third toplevel project)
- Handle feature request, bug reports and coordinate effort from "third parties"
- Organize bounties:
-- Firmware coding bounties
-- Hardware design bounties
-- Hardware manufacturing bounties (the minimig shop?)


I really like the idea of adding hardware/firmware bounties because it assigns tasks and allows for a way to try to recover some hardware development costs. It can get a little pricey building low volume prototypes.



 :-)
 

Offline arnljot

Re: Minimig PCB run - interest thread
« Reply #442 on: August 26, 2007, 02:20:20 AM »
Quote

jkonstan wrote:
[I really like the idea of adding hardware/firmware bounties because it assigns tasks and allows for a way to try to recover some hardware development costs. It can get a little pricey building low volume prototypes.


While I think that reverse auctions, or tenders for building the hardware won't be lucreative for any hardware manufacturer to deal with a minimig opensource project.

I'm sure that many amigians (migians?) have connections or know people in the hardware industry. And a scheme could be set up where say the project agreed with a manufacturer to build say 100 minimigs at an agreed price.

The minimig opensource shop would then collect prepaid order (a counter on the front page!) and dispatch the money and order to the manufacturer when the target number of orders where met.

One problem here is that it would have to be "binding non refundable" orders which is in conflict with most eu/us/asian consumer laws. The reason is to handle the logistics and problems with commitments with the manufacturer and waiting time whilst eager amigians wait for their kits.

But you could say that:
- The vendor get €40 per assembled minimig board (€4000 for 100 boards)
- The project gets €60 euro from each user per board
- €20 "surplus" goes to bounties (posible refunds and paypal disputes) and posting and handling upon delivery from manufacturer to each end user.
- If 100 orders cant be met within 12 months, all order ar null and void and money is refunded (either full €60 or the €40, depends on what the user agreed when preordering, the rest €20 goes to bounties).

These are just ideas for manufacturing bounties. There are a lot of problems and challenges that needs to be sorted out, and eventualities that needs to be planned for. But I'm sure that we (the amiga community) could make something genuinly unique here now.

For the bounties I think it should work this way:
- Requests and bug reports are received by the minimig umbrella project
- The umbrella project sorts and categorises them and defines milestones, targets and plans for each item (hardware and software)
- Each target or "deliverable" if you will becomes a bounty
- Either it's solved for free by the community (preferably) or bounty donators vote and assign money to different targets, and people or parties deliver the target and claim the bounty.

These are just some ideas, and all probably need massive refining before they can become viable.

But I think that someone who knows Dennis should approach him (I dunno how often he reads here), and ask him if he's interessted in supporting some people in organising something like this.

It seems to me that the aros guys are pretty organised and also quite experienced. I'm sure one or two from that team wold mentor such a project like this if it were head up by the right people (known entities in the amiga community).

Suggested "Minimig community project" startup:
1) Identify a spear head person
2) Approach Dennis and get his blessing/involment
3) Beg for mentorship from aros guys
4) start building the minimig community
--) This means that 10 developer boards should be built
--) Developer boards are given to proven amiga developers with track record
--) Developer boards are returned to the minimig community project if no significant deliverables are made after say 6 months
--) Developer boards can in them self be bounties for the developer if a contribution is deemed worthy of the project.
5) Nominate Dennis as head hw designer with a second in command head designer
6) Nominate a software head designer with seccond in command designer
A posting a day keeps the sanity away...
http://www.arnljot.com
 

Offline freqmax

  • Hero Member
  • *****
  • Join Date: Mar 2006
  • Posts: 2179
    • Show only replies by freqmax
Re: Minimig PCB run - interest thread
« Reply #443 on: August 26, 2007, 02:32:10 AM »
arnljot:
The url is: http://www.opencircuits.com/Minimig_Project
(just noticed the spelling :-) )

I think people will do whatever they feel is rewarding because of what can be achieved rather than any monetary gain.

As for USB, maybe it's possible to do some "USB Light" in verilog, invisable to the Amiga? (or a small soft cpu to do the data management).
After looking at what the FPGA ports can be configured into. It seems both USB-12Mbps and 10Base-T can be accomplished by directly connect said interfaces to 3-4 resp 4 io pins.

What I think should go into Minimig v1.1 are the issues mentioned below, to be solved and integrated:
http://www.opencircuits.com/Minimig_Board_v1.0_issues

I have added a lot of info on the minimig worthwhile for anyone interested in starting lowlevel bit poking in minimig. At present it looks like hardfile r/w support can be implemented by a simple modifications of verilog sources, and mcu firmware. Same goes for 10Base-T, as it happens user0+1 and user2+3 consist of two differential capable io's.

As for actually producing a minimig v1.1. I have component list and schematic. It's just the "pcb" program that don't seem to want to autoroute the board.
 

Offline arnljot

Re: Minimig PCB run - interest thread
« Reply #444 on: August 26, 2007, 02:47:46 AM »
Quote

freqmax wrote:
arnljot:
The url is: http://www.opencircuits.com/Minimig_Project
(just noticed the spelling :-) )


I am aware of this site. The page seems more "wikipedian" rather than a work tool for an open source project. It should be more documentary of the project (like a part list!).

Quote

freqmax wrote:
I think people will do whatever they feel is rewarding because of what can be achieved rather than any monetary gain.


And thats the "magic" and power of open sourcing! But I do also believe in bounties as an added tool for fast tracking some developments and sourcing some help from other parties that normally wouldn't be available to an opensource project. Like for instance an bounty to fix the designs and make them more widely available to more people, like the file format and incorporate the 1.1 memory hack in the 1.0 design. These seem to me like trvial fixes a PCB board manufacturer should be able to do when doing a first batch run to manufacture the board.

Quote

freqmax wrote:
As for USB, maybe it's possible to do some "USB Light" in verilog, invisable to the Amiga? (or a small soft cpu to do the data management).


This was my thought too. As far more feeble devices than the minimig can handle simple USB operations (like stereops etc). This should be handled in a "WinUAE" way so that periperhals (mice joystic) is available as control devices in the amiga, and storage devices should come up as harddrives (UAE style).

Quote

freqmax wrote:
After looking at what the FPGA ports can be configured into. It seems both USB-12Mbps and 10Base-T can be accomplished by directly connect said interfaces to 3-4 resp 4 io pins.


Nice, btw. You seem like a fellow who should be recruited by dennis in an open source project as someone either a doer (if your skills match) or at least as admin as you can assess the merit of goals and their complexity?

Quote

freqmax wrote:
What I think should go into Minimig v1.1 are the issues mentioned below, to be solved and integrated:
http://www.opencircuits.com/Minimig_Board_v1.0_issues


Agree, a version 1.1 should be a cleanup and update of what exists so far.

Quote

freqmax wrote:
I have added a lot of info on the minimig worthwhile for anyone interested in starting lowlevel bit poking in minimig. At present it looks like hardfile r/w support can be implemented by a simple modifications of verilog sources, and mcu firmware. Same goes for 10Base-T, as it happens user0+1 and user2+3 consist of two differential capable io's.

As for actually producing a minimig v1.1. I have component list and schematic. It's just the "pcb" program that don't seem to want to autoroute the board.


See, now there is atleast three people capable of taking care of the minimig community: Dennis, xenepp and yourself! ;)
A posting a day keeps the sanity away...
http://www.arnljot.com
 

Offline jkonstan

  • Full Member
  • ***
  • Join Date: Dec 2005
  • Posts: 243
    • Show only replies by jkonstan
Re: Minimig PCB run - interest thread
« Reply #445 on: August 26, 2007, 03:07:57 AM »
The issue with USB host on the present Minimig PCB would be the lack of CPU MIPs (the slow clock speed of the 68SEC000 CPU) and lack of spare FPGA I/O pins. A seperate CPU on a USB HOST controller such as the FTDI Vinculum USB HOST controller might work becasue it has a seperate CPU of its own running the USB stack although we would have to use a SPI interface to connect to it since we only have 4 spare FPGA I/O pins. The speed of a serial SPI connection from 68K/Xilinx_FPGA  would most likely limit the bandwidth/transfer rate. Data sheet has Vinculum SPI port max SPI Clock = 10Mhz => 10Mbits/sec Max SPI transfer rate (if no signal integrity issues arise). A FTDI Vinculum USB HOST controller small daughtercard that connected to MiniMIG1 Spare I/O header J9 could be built. We may have enough 68K CPU MIPS to handle this kind of implementation.  

http://www.vinculum.com/


Other soft USB option (not feasible on MiniMIG1.0):
A usb phy connected to an FPGA would require @ 7 FPGA I/O pins and an embedded Xilinx microblaze soft CPU core to run the USB Stack. The USB stack is large; thus, the microblaze CPU would need external RAM access. The RAM is tied up by the 68K and FPGA_AMIGA_Chipset. Thus, the soft USB option does not look to good for MiniMIG1.0.

http://www.fairchildsemi.com/ds/US/USB1T11A.pdf

 :-)
 

Offline arnljot

Re: Minimig PCB run - interest thread
« Reply #446 on: August 26, 2007, 03:24:35 AM »
@all & @jkonstan

I'm really impressed with you guys and your tech knowledge!

If only all these investigations where logged in a project and kept organised... ;)
A posting a day keeps the sanity away...
http://www.arnljot.com
 

Offline freqmax

  • Hero Member
  • *****
  • Join Date: Mar 2006
  • Posts: 2179
    • Show only replies by freqmax
Re: Minimig PCB run - interest thread
« Reply #447 on: August 26, 2007, 03:31:41 AM »
My idea with usb was to exploit the User-I/O header. Connecting User0+User1 to D+ & D-. And let say User2 select pullup on one D line to indicate speed. Thus eliminating the need for any external PHY, and any resulting io consumption.

Also USB might save pins. The SD/MMC slot, Keyboard, Mouse, Joystick0, Joystick1 can be replaced.

Maybe replacing the MCU with an CPLD is a viable option?
That CPLD would then be fast enough to handle Ethernet, USB aswell as booting the system etc.. And it doesn't need a boot eeprom.
Another option with CPLD is FPGA reconfiguration via ethernet.. :-)
 

Offline jkonstan

  • Full Member
  • ***
  • Join Date: Dec 2005
  • Posts: 243
    • Show only replies by jkonstan
Re: Minimig PCB run - interest thread
« Reply #448 on: August 26, 2007, 10:41:30 AM »
Spartan3 I/O is programable/flexible; however, I am not so sure that it is flexible enough to eliminate the need for an external USB HOST Physical layer. I would probably count on needing an external USB HOST physical layer such as the Fairchild part below.

http://www.fairchildsemi.com/ds/US/USB1T11A.pdf

Actually, replacing the 68SEC000 CPU with part of the Xilinx Spartan3 might be an option. I have the downloaded the VHDL source to an ATARI ST project that includes an almost finished 68K CPU. This would free up lots of FPGA pins.

I need to get my MiniMIG(s) going so that I can get some development going.

  :-)
 

Offline Methanoid

  • Full Member
  • ***
  • Join Date: Jan 2004
  • Posts: 147
    • Show only replies by Methanoid
Re: Minimig PCB run - interest thread
« Reply #449 on: August 26, 2007, 11:36:54 AM »
Xenepp, can we have an update on what is happening re building boards?