Atheist wrote:
Hi Karlos,
So, do you think a 64 bit CPU would need 8 bytes of ram per stored instuction, and/or 8 bytes on a disk?
AmigaOne! Where do you want to go today? :-D :-D
Not necessarily. I can see there is some confusion on what exactly a N-bit architecture means. A 32-bit system does not have to have 32-bit opcodes. A 68020 is a 32-bit processor, but the opcodes are still 16-bit.
The PowerPC is a RISC architecture and uses an orthogonal 32-bit instruction set because it simplifies the hardware design (a common RISC aim), which allows fewer transistors, higher speeds etc.
The big thing with 64-bit technology is a move to full 64-bit addressing capability rather than instruction size.
For example, x86 has had both 64-bit data bus and general purpose registers since the Pentium2 generation. As such, they can perform 64-bit integer arithmetic without software assistance, just like the 68040 can do a full 32x32 bit->64 bit multiplication (but uses two 32-bit regs to hold the result).
Despite the support for 64-bit datatypes, these are still classed as 32-bit CPUs. The physical (non virtual) pointers they use are still 32-bits which means that the CPU can only access a 4Gb physical address space. MMUs perform physical to logical mappings that expand that address space to something like 56-bits on a 603e.
The true 64-bit generation CPU's allow a full 64-bit physical address (ie all bits of the register used to hold a pointer are used) and have a full 64-bit address bus capability.
There is no need to increase the instruction word size. However, a full address specification will require 8 bytes, as you say.
There may be cases of 64-bit opcodes that actually pack several instructions into one 64-bit word. This is the so called VLIW architecture (Very Long Instruction Word) that intel has been researching as the next big thing...
