The short answer is no. Datasheets for logic such as the 74F244 buffer will explain electrical characteristics of the IC such as voltage limits, switching thresholds, drive levels, slew rate, propagation times, etc. In the case of the buffer, the output function is the same as the input function, so that's easy - the output will be the same as the input. The buffer input signal is generated directly by the DRAM controller (part of U2/Agnus). Meaning you'd need to have a good understanding of the details around DRAM access. I've been an electronics design engineer for 30 years and often find that confusing, so not a good topic for someone new.
Or to explain another way: the easiest way to know what to look for is to measure on a working A500 for comparison, not by reverse engineering the DRAM control logic. Remove the ROMs from both working and defective boards so they're in the same state.
But you're on the right track. As I mentioned above: "See what A0 looks like at the input of the buffer (U34 pin 11). It should look the same on the output (U34 pin 9). If the address data looks OK at the buffer input, but it's bad on the output, that's the problem."
