Okay, heres an idea I came up with a while ago to add extra features to a c64's cpu. Never tried it though. I don't see why the same idea couldn't apply to 68k.
For starters, the main difference is that the newer CPUs have more abilities, most notably the 32 bit databus, the mmu and the fpu.
Considering the a500 is a 16 bit databus and the 68k has it's 32 bit bus multiplexed internally anyway, the alterations that need to be done would be the extra opcodes (relatively easy), the FPU (moderate) and the MMU (depending on the desired CPU result...very hard)
For a hardware only solution without software patches, some odd kludges can be done...I believe.
Opcodes: They all go via ROMs. The output mostly mirroring the input, except for the new opcodes.
For these new opcodes, a different opcode is sent to the CPU such as a simple add for example, utilizing the memory accesses for the new opcode.
This saves extra wiring for the addresslines. (a buffer would be placed on the datalines to 'mute' the cpu) The PIC, FPGA or whatever intervenes as a result of databit(s) in the ROM allocated to the control of the 'custom' chip. This could do something such as say "grab the data from the bus on clock tick a, mess with the bits, then send them off on clock tick b ( when the cpu is going to do the write).
Anyway, that's the beginning of my idea. Please feel free to find faults as I'm sure it's a terrible idea anyway.