PowerPC emulation on x86 possible?

[minator]

Note that modern X86 processors (e.g. K6/K7/K8 and Pentium Pro/II/III/VI) translates X86 ISA into smaller RISC like instructions via HW decoder/translator before pumping it into the Post-RISC pipelines architecture.

I seem to remember writing a long article explaining why thet's really only a myth.  It looks that way at the high level but at the lower levels the original ISA adds a great deal of complexity that pretty much cannot be removed without either breaking compatibility or destroying performance.

I'd bet even Transmeta CPUs have hardware dedicated to the x86 ISA.

PPC Vs x86

Well, I don't see there needs to be much over head with simple emulation of the instructions.
But I do agree the MMU (and Altivec etc...) is a totally different matter.

But it's also involves emulation of the 32 registers using just 8 and somehow mapping the PPC FPU onto the x86 FPU which is a completely different design.  This is going to be amazingly complex and probably horribly slow due to constant cache thrashing - before even starting on Altivec or the FPU.

That said IIRC Motorola has a PPC emulator for the PC.

[minator]

Be died because of management snatching defeat from the jaws of victory.  Be management decided to go IABe which they can no clue on how to do a STB OS and alienated the Be Devs.  Sure reciepe for distaster, which happened.  If anything, BeOS exploded in popularity (compared to when it was PPC only) when it went x86 because it allowed so many more devs to pitch in an code without having to buy some exotic (and expensive) BeBox.   Again, Be went with giving people choices, and until their management got stupid, that choice was working.

They didn't have much of a choice, they were held off shipping PCs due to MS licensing so were not going to make anything, they had enough money for a year left so they spent it on BeIA because they thought it might make them something.  It didn't, but had they remained on course they would of most likely had the same fate.

This wasn't obvious at the time, the story only came out much later.

The eVilla might have saved them but it's performance was crippled by the sideways mounted screen and it never took off.

[minator]

bloodline

I'm far more interested in the technical aspects than being right or wrong.

have already given my Critique of the outdated, but  beautiful work of FUD that is the infamous CISC Vs RISC article. I won't rehash it here.

How can you claim to be only interested in the technical aspects then claim my article was "Outdated & FUD" - of which it was neither.

That RISC chips are more efficient than x86 is not exactly new news...

But you don't have to take my word for it read
this.

[minator]

That comment says it all. You use the word efficient like it means something by itself.

I ask you is is more efficient for me to buy a 3Ghz P4 or a 876Mhz G4, for the same price? Efficiency is all relative.

You're the one who said you one wants to look at things from a technical perspective, make up you mind, do you or don't you?

In terms of your laptop, efficiency is a big deal.  If the CPU is effieient it'll give you longer battery life.  Do you think a 50W difference is worth it for perhaps 2X the speed?  The G4 uses 20W and thats an old version, the modern low voltage G4s go down to 7.5 Watts at 1GHz, Compared to the P4 which uses 70 Watts.

And for your application the fact the G4 has Altivec will make quite a difference, on Altivec code the G4 it's quite probably to outgun the P4 even at 3GHz - because the design is less efficient.

I really don't want to have to go into the pointlessness or your article again, since I've already explained how you totally missed all the good points of the PPC and focused on just trying to make the PP look better (the PPC970 is a great chip why lie to make it look better?).

Would you care to explain that accusation?
I did not lie about the 970.

Yes, your article was horribly outdated. The PPC is no more RISC than the X86. Sure the architectures both started at different ends of the spectrum, but now they are so similar it's a pointless argument. Both chips are aimed at the same market (the desktop, thus both have evolved in a similar way)

Did you even read the article?  It was not from 1990!

The techniques and thus high level architectures have pretty much converged.  I know that, I even explained it.
Underneath at the micro architecture level the impementation is very different and this difference is due to the ISA.  Decoding the instructions into simpler blocks (which itself requires a stage) does not solve everything, you have the smaller number of registers to deal with.  If the CPU has Out of Order execution the smaller number of registers is going to have a big impact on the design of that stage making it considerably more complex.

The P4 and Athlon are both very fast CPUs, but in order to get that speed they have to do a lot of work and consume a lot of power.  If IBM put the effort into design they could produce a faster processor in the same silicon technology.  I don't kow if the 970 reaches that goal (at least with current compilers) but I expect the next gen (due next summer) may do so.

If you talk to any CPU designer and use the words RISC and CISC he will probably laugh at you.

As for your link?... Give up, look at a real site like:

http://www.arstechnica.com/

Hate to tell you this but the site I linked to is frequented by er, CPU engineers...

If you want to see real RISC chips then look at the Alpha, MIPS and ARM

Alpha gave up being "pure" RISC in 1998.  MIPs pioneered the long pipelines in use now in the early 90s.

ARM is "pure" RISC but they are desiged for low power, not speed.  That said even they plan to go superscalar in their next revision.

[minator]

What about the efficiency in using the money you have?

You get what you pay for  :-D

try against “Pentium M” i.e. Intel’s X86 processor designed solely for light and thin markets.

It'll go against the lowest G5 which uses pretty similar power.  The difference is the Pentium M was specifically designed for low power whereas the G5 wasn't.

Note that the Pentium VI was built for clock speed first than IPC second.  The Altivec doesn’t rescue PowerMac G4 @1.4Ghz in every cases from being last in graphic extensive applications e.g. modern 3D games.

I never said it did, it'll only pull ahead on Altivec stuff (i.e. audio effects) otherwise the P4 will run faster.  Motorola gave up on the desktop market some time ago so these are basically embedded chips designed for low power.

References;
http://www.barefeats.com//p4game.html

Running benchmaks which test the graphics system, does not say much about the CPU.  Unfortunately thats exactly what barefeats did and produced useless results as a result.

Any tests I've seen put the G5 in line with the top end P4s, in front sometimes, behind in others.
I've yet so see anything directly comparing the G5 and the Opteron / Athlon64 but I suspect the AMD may have the overall lead.

That said neither the AMD or the G5 have good compilers yet and have anytime soon, it'll be interesting the see the results then.

Quote:

If the CPU has Out of Order execution the smaller number of registers is going to have a big impact on the design of that stage making it considerably more complex.

Register renaming schemes is the way to expand the limited registers of the X86-32 limitations.

Not quite, it's there to boost IPC.  It doesn't give you any extra registers the developer can actually see.  Everything is still compiled to use the 8 "architectural" registers so the OOO hardware has to map all the rename registers onto them.

A big difference between PPC and x86 is the PPC has to work less to increase the IPC.  The Pentium 4 has 128 rename registers, the G5 has less than half (48) yet the G5 at a 50% lower clock rate is performing in line with the P4.