You know, this reminds me of work I've been doing to make a unit that can act as a 14Mhz 68000 in one mode, or a high-speed RISC in another. Basically, adds a decode step to the pipeline for when in the legacy mode. The m68k instruction set just does not scale up for higher speed very well, hence why the new RISC'ier setup. But for legacy apps, the decode would give backwards compat.
Nothing beyond a draft tho as I'm still getting the RISC core to work right.
