Going RISC was "in" in the late 80s/early 90s.
At the time, it was possible to design a fairly competitive and cheap RISC design on a budget. So pretty much everyone did. Most every bigger workstation maker had an inhouse RISC design in the works(SPARC, DEC Alpha, HP PA RISC, SGI bought MIPS..). Add to that that most IT experts prophesized the death of CISC/x86.
But in the early-mid 90s, Intel(and Motorola with 040 and 060) showed that RISC features can be implemented in a legacy x86/68k... Rest is history.
Sad thing is 68060 was pretty competitive at that time, especially in integer performance. All it needed was a fully pipelined FPU(P5 Pentium had one) and out of order execution(P6 Pentium). P6 evolved to Core processors of today(Pentium 4 was a different design). So 68K in 2012 was very doable