Whilst I am, the first to point out that from a coding model, the x86 sucks like hell, the whole register issue is a lot more complex than "it doesnt have enough registers to emulate it well"
Internally, the differences between RISC and CISC blurred years ago.
In fact, most recent x86 chips have stupid numbers of registers, existing as 'shadows' of the main register file. This is like the rename register concept in PPC.
Nobody really thought that AMD and the like get the performance they do by actually relying on a 4 register user model, did they? :lol:
As for performance, Kenny is right that 'normal' benchmarks are pretty useless way of determining JIT performance. Quite where he got 35% from is hence also dubious - one application is hardly representitive.
All I am saying is that it is the start. The whole x86 is driven by competition far more fierce than the PPC platform.
It could be that in a few years, emulation of current generation of PPC chips on whatever lunatic clockspeed x86 room heaters are out by then is faster and yet still cheaper...
