Pegasos G4 Upgrade

[MiniBobF]

The increase in performance of L3 Cache is to the order of 3%, (depending on the size of code executed). It's not some dumb excuse made up by small players in the Amiga market.

The company I work for has to add L3 cache to its designs not for performance increase, but due to a "must have the box ticked on the data sheet" mentality the marketing give us.

Them that be in the management are leaning on Motorola to release a white paper concerning the L3 cache performance increase. Or lack of!!

Neil Thomas, AKA MiniBobF

[MiniBobF]

THere is one drawback to Peg design: USE OF ARTICIA CHIPS !!! Though that wasnt their fault... now we know though.. Peg2 will be great.

The only drawback of the Pegasos I design is... the DESIGN of the Pegasos I. The chipset incorporated into the Pegasos design works okay on other boards (and no, I'm not refering to AmigaOne/Teron - OTHER boards). The problem with the Pegasos is a layout, termination or signal integrity issue. That is an artwork issue, i.e the design of the Pegasos PCB. Granted though, perhaps the chipset is not so tollerant of poorly formed waveforms as perhaps more mainstream PC chipsets.

From the TECHNICAL standpoint, does anyone know what the April interposer does? Answers like "It makes it work", "it makes it work better than Teron", "there's no Mai without April" or "It doesn't matter because Pegasos II will replace it" are not considered concise or technical.

Neil Thomas, AKA MiniBobF

[MiniBobF]

I have to admit I'm very impressed by your ability to diagnose systems you have not designed, out of your armchair, not even knowing what bplan's fix fixes. As to MAI's Arctica, it seems to work reasonably well in MAI's evaluation boards which should not surprise anybody. It also works well in designs derived from those boards. Big surprise. But it did not work well in the independendly designed Pegasos before fixes were added.

Pegasos is not singularly the only independantly designed board, which is my point. Make a search on www.armada.ch and you will find their are other developers, independent of Mai, who produce marketable goods. What additional skills or information does that firm have that Genesi doesn't have? Probably no difference in access to information or skilled personnel. The difference is, they got it working, without blaming one of the few most important device in a system.

it's better spec'ed and should require more design skills than an Arctica-based board.

What do you mean by "more design skills"? I assumed also, that by Articia-based board, you refer specifically to Articia S? Articia P is of course similalry speced to Disco 2, but with the addition of AGP.

Neil Thomas, AKA MiniBobF

[MiniBobF]

Point noted.

I wonder though, I doubt they'll make use of PCI-X, even though the chip has it. PCI is 133MHZ, and MUST be point-to-point. This means only one device, and the bus is limited to 3 inches in length. It's not as simple and to just not fit a card, as the bus is then shaped like a T, and reflections are set up.

In addition to that, are there any PCI cards available in PCI-X yet? Maybe there are, but more server orientated, not for the desktop user! There are plenty of PMC cards that do PCI-X, but it's a different ball game.

I would hope they make use DDR and Gigabit ethernet functions. Most important factor with DDR is to match the clock and signals tracks as closely as possible. Not tracking other busses above or below is important too, but on a 4 layer board, the scope is limited. Or has the defacto PC motherboard moved to 6 layer yet? Probably not.

Providing the Northbridge is located close to the CPU and tracks are matched, running the CPU bus at the higher speen shouldn't be a problem.

I wouldn't be supprised if the bus is not run at that higher rate. Genesi have problems with the socketed interface (hence the need to sell the latest G4 'upgrades' as matched sets, so you have to ssend you Peg back again). These problems will be exaserbated by the higher clock rate. Matching track length over the legth of a connector is much harder if that connector is long and thin, rather than square.

Ever wondered why Intel dropped those slot designs?

Depending on characteristic impedance of the motherboard, the skew in clocks over, lets say 3 inches is about 1ns - and at 533Mhz (or whatever the current fastes PIV FSB is) is about half that time!

Easy to make a bus not work then!

Neil Thomas, AKA MiniBobF

[MiniBobF]

One can solder a BGA to a PCB, and mount the PCB is a socket.

Of course, to package on a ceramic plate, and add an array of pins to the bottom cost more than to produce a BGA. Additionally, it's easier to pack balls in tight and retain their stregth than it is to pack in a pin grid array.

The reasons for dumping slot form factor is more technical than that too. Imagine trying to mount 200g of aluminium to the side of a chip mounted in a slot - it's not going to work..

Neil Thomas, AKA MiniBobF

[MiniBobF]

A BGA can still be mounted on a PCB and be attached to a mother board in a way other than linear contacts along one edge.

Much like the AmigaOne XE/TeronPx.

(Maybe it's not the PX, I can't remember)

This way, A BGA chip can be mounted on a motherboard, can still be removable, is parallel to the motherboard (so no drastic increase in profile) and does not have a long thin line of connections (but a grid).

Neil Thomas, AKA MiniBobF