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Author Topic: CPU Instructions Q.  (Read 5317 times)

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Offline filson

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Re: CPU Instructions Q.
« on: March 18, 2003, 02:03:14 PM »
@MiniBobF In regards to the 16bit instruction + 16bit data.
The G4/G3 processors aligns all instructions on 32bit boundries so even if an instruction takes 8 bit, it will still be padded with 0's till it's 32bit long. Thats part of the MSB/LSB thing. PPC has MSB where bit 31 is 1 bit in instruction, optionaly padding till bit 0.
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Offline filson

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Re: CPU Instructions Q.
« Reply #1 on: March 18, 2003, 02:23:10 PM »
Thats not realy going to be a problem as 120G harddisk is dirt cheap. Windows can become as bloated as it ever want.  :-D

What's more interesting is how many patches they have to release because they don't know how to program efficiently. RISC isn't realy that lenient on bloat ware.
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