Adding to what Djole just wrote, there was a comment in the now deleted and restarted FPU thread on the Apollo-Core forum that modern software for floating point seldom uses raw FPU functions anyway but instead usually uses SSE2 on the Intel as a minimum so that 4 times the computation can take place. I doubt there is room on the current generation of FPGAs to do a full floating point vector unit so it is likely that Gunnar is just finishing up what he can do with the current generation before he even thinks about starting the next generation. Sometimes I wish I had his discipline to finish one thing before starting the next.
