[Vampire] The AMIGA Future Is NOW! AROS!

[SamuraiCrow]

I just read the thread. We already have two hdl implementations of the AGA chipset, mine and the minimig derived one. We have extensions such as extra memory, RTG, AHI audio etc already.

I guess the game here is to add propriety extra features and build a new platform, but that potentially breaks back compatibility. For them it makes sense to open source that part of the design to encourage people to use those features. Personally I'm much more interested in a new, cycle accurate (and high performance compatible) open source CPU, which is what we are working towards.
Why not just compile AROS to cheap modern CPU platforms?
/Mike

Where do I start?

• AROS runs hosted on Linux on the RasPi already.  There's hardly any software that runs on ARM AROS.  Same goes for x86 and AMD64.
• Running UAE4ARM on a RasPi 3 is good enough to emulate an A1200 quite well already.
• The SAGA core implements the chunky and YUV modes as a third playfield by re-purposing a register in AGA that was intended for a greyscale monitor that was never produced.  It's not a separate RTG mode, it's all integrated.  THat's actually the main reason for AROS: new graphics drivers that work as one.
• Since the closed-source 68080 core performs as well per clock as a Core2 Solo, it'll keep up with the modern systems quite nicely!  Especially when compared to an ancient 68060 clocked at twice the clock speed!  Note:  The minimum clock speed of the '080 is 78 MHz already so I hope you can clock your 68060 board at a minimum of 144 MHz...  ;-)

[SamuraiCrow]

Sounds remarkably clueless for someone that has produced a working core.
Current predictions of faster speeds in FPGA are extremely unlikely without adding cache to the processor.
Much higher speeds in an ASIC will require further re-engineering of the cpu.

Do you actually think you just turn up the clock speed of a cpu like a rheostat in an analog circuit?

A small team of developers is going to make a 68K derivative outperform 2GHz 64bit PPC and ARM cpus?  

"we know..."

REALLY?

When monkeys fly out of Gunnar's butt.

PPC and ARM are RISC machine punching bags.  Gunnar used to work on PowerPC cores at IBM so he should know.  It AMD64 that's the instruction set to beat.

As for caches in an FPGA, there are bigger and more expensive FPGA models than what we're using....

Looking forward to the butt monkeys in Germany.