In theory, the '040/060 could run asynchronously in parallel to the PPC (WarpOS + 3.x worked that way). However, OS4 isn't up to handling SMP/AMP, it needs to be designed that way.
It's not just OS4 that needs a redesign. The Phase5 accelerator card has only one memory bus so it CANNOT run both processors at the same time. It can switch between them, but not run them in parallel.
