Well, prof says that it's a general definition that the CPU goes idle until DMA completes. He did say that additional circuitry could be added to be smart about sharing bus cycles, but that such added complexity may not be worth while, and is often not done.
He is wrong, while it's possible to do what he says, there are no commercially available computers or consoles that always stop the cpu when any dma activity is occurring. On a unified memory architecture where the cpu and gpu access the same ram, the cpu would never get a chance to run unless you turned the screen off.
It's possible to completely use up all the chip ram bandwidth on the amiga & lock out the cpu, however using less bitplanes & changing the blitter priority to lower than the cpu you can run code while the dma is occurring.
