Adapteva Parallella-16

[Bif]

If I understand this correctly it is to ARM what the Cell Broadband Engine is to PPC?

Only watched the video but it sounds something like that, and I think I've seen this many months before. The core concept seems to be keeping all the CPUs to their local memory instead of dealing with shared caches/memory (e.g. Cell).

I think they are doomed to failure.

The hardware might work great, but I'd make a bet it wouldn't perform much better than a typical X64 + GPU. They may be advertising it as cheap but I'm not sure it would be too cheap by the time it made it into a consumer device.

The real problem is software. Who is going to run out and port their software to this? You are looking at a massive redesign/rewrite to work Cell style. Not only that, but this kind of architecture imposes a constant limitation on you where not having quite enough local memory causes constant design juggling of fitting your work in it vs. keeping work units large enough to pipeline things. You also get all sorts of code/feature design problems due to the fact that you need to stay in local memory to be efficient, try to go read some global variable and you are toast. It causes a constant feature vs. design vs. efficiency tension (hey I just need to read that byte over there for this new feature, easy, right? no, I need to redesign how a whole pile of modules interact with each other to keep it efficient, fun fun fun!).

All this to make it work on this chip that is probably going to have less market share than the Amiga? Sounds like a winner.

I designed and implemented multiple large software components to run on Cell, and know gobs of people who also did this. I still admire some things about Cell from a technical point of view - I think the main thing is it forces you to do is recognize your memory access patterns and cause you to intelligently let your design do the work of the cache vs. the CPU guessing it. Code designed for Cell architectures will probably work faster on unified memory architectures than haphazard code. But I sure as hell don't want to go back to Cell, and I don't think you will find many people who will. There is giant relief in the game industry that everything is going back to X64/whatever normal CPU. Crap is just so easy to implement now it's ridiculous in comparison.

If this architecture ever does catch on, and some variant of it probably will decades from now, it will probably come from Intel or some other giant. This chip is going to just be played with by some nerds and researchers.

[Bif]

I think trying to port a general purpose OS directly to the Epiphany architecture won't make much sense at this stage. It might be fun to do if/when they meet their goals of versions with substantially more per-core memory.

Looks like you've looked at this more deeply, thanks for all the details.

I think you have a good point about these chips being useful for special purposes. The embedded market would probably be OK with the software pain if it could give a good multiplier in performance for $ or power consumption vs. other architectures. That is the key though, it has to offer that multiplier and stay well ahead of the curve. Cell was a pretty amazing chip when it came out for raw horsepower and touted the same "new design doesn't have to carry baggage thus can perform better for the money", but it wasn't too long at all before Intel chips were surpassing it again. Cell was also touted as being great for embedded stuff but I don't think it saw much use beyond a few TVs and such. I will be curious to see how well these chips perform against others over time. I think you also have to throw in GPU type chips when looking at cost/performance for embedded devices that require a lot of horsepower (E.g. TVs).

Also sounds interesting about how quick it is to read memory from other CPU's memory. However, I think reading memory from other CPUs is a pretty specialized thing that requires even more complex software to take advantage of. This means you are probably implementing an assembly line multi-core software model where each core takes the work from the previous core and does another set of operations on it. This was tossed around a lot with the Cell early on as it can essentially do the same thing via DMA between SPUs, but the drawbacks of trying to manage this efficiently are ridiculous, as you have to ensure each task on each CPU takes about the same amount of cycles in order to keep the CPUs optimally busy with work. I don't think that model got much use at all.

Anyway, I do find this all interesting as a nerd type myself, just trying to relate how I think it might shake down based on past experience with stuff like this.