Interest check: An updated MiniITX-MiniMig ( Pics!!! )

[yaqube]

Yes, I have completed write support and it seems to work pretty well (it's not perfect since standard ADF's are decoded MFM sector data, so only write to standard tracks is possible).

The ECS support is only partial. Only ECS blitter and PAL/NTSC switching is implemented. I had to remove programmable beam counters due to limited FPGA resources. They were consumed during improving compatibility. Maybe further code optimization would free some but at that time I was focused on getting more games to work.

Current implementation is not perfect and there are still things to fix. It will be done when I have more time.

All the project files have been sent to Dennis and he promissed to put it on his site after reviewing them. It was my agreement with him. I haven't heard any news from him for a few days and I guess he must be on his holidays. We must be patient.

[yaqube]

The hardfile support is next on my list.

But due to limited PIC resources (mainly RAM) expected transfer speed isn't high. Traversing through FAT on a disk seems to be a nightmare. That's why I've decided to switch to ARM microcontroller. Then it would be possible to add LFN and subfolder support (the FAT16 root directory is limited to 512 entries and you can have as many files there as long as all of them use 8.3 names - mixing lower and upper case letters or using some characters takes one LFN entry more). Also alphabetical sorting of files would be possible, currently they are displayed as their entries were created within root directory.

I have written small program (Windows) to sort alphabetically root directory entries on flash card and remove LFN's to make room for more files. Currently there is no point in using cards bigger then 512MB since you may have max 512 files (actually volume name takes one root entry so if you name your card you can have max 511 files) of 880KB each. It's good to format your card with maximum allowed cluster size of 32KB, access to files can be slightly faster. This program will be available soon after I do more tests.

I have designed an adapter board with ARM micro which can be plugged instead of existing PIC micro. The PCB is about to be manufactured. I consider it as the next step of Minimig evolution (all together with switching from SRAM to SDRAM, 16MB of SDRAM are cheaper and faster then 2MB of SRAM).

[yaqube]

It would be possible to plug a PCB with ARM into the PIC socket on all existing Minimigs.

The SDRAM will require PCB change so it would be limited to new PCB designs like Illuwatar's one. Although I will try  to implement it on my Minimig using wires first. But this solution isn't feasible for others.

@alexh
The SDRAM pinout is different from current SRAM's so no drop-in replacement. The SDRAM's address bus is multiplexed so current number of memory IO pins should be ample.

[yaqube]

@alexh
It's an ATMEL AT91SAM7S256. http://www.atmel.com/dyn/products/Product_card.asp?part_id=3524

It has 256KB Flash ROM and 64KB RAM on chip. It's not an overkill, it's a simple and small MCU with ARM7TDMI core. No external parts exept a crystal and some passive elements. It has built-in USB device port and factory programmed boot loader so firmware upgrades are possiible through USB connection.

More over it's possible to create USB mass storage class support (or adapt existing one) for Minimig's SD-Card so you could write to it through USB (solution similar to the PSP). But this is the future.

[yaqube]

@Illuwatar

I can provide you with the outline of my adapter board and its component locations so you will be able to optimize component placement of your board (mechanical constraints).

What file format is suitable for you: Gerber, DWG, DXF?

[yaqube]

Ok, I had a look at my sources and found that in not scan doubled mode Dennis' core outputs a static one on vsync output and my core outputs vsync signal. Both cores outputs csync on hsync output. The AD724's vsync and hsync inputs are XNOR'ed so in this case it may lead to missing vsync (is the screen slowly scrolling verticaly?)

If you have connected the AD724's vsync input to the FPGA's vsync output with a resistor please remove it and apply  high logic level to the vsync input of the AD724. Please tell me if it works so I will make a modified version.

[yaqube]

@Peter

I have checked the sync signals with my scope and cannot see anything wrong. :-(

I have also found an AD724 in my drawer :-D so I will make a small test board during the weekend and see why it doesn't work as expected.

[yaqube]

The csync signal has the same polarity as in the original core. But I have changed blanking to match what can be seen on a real Amiga (left overscan was invisible).
On regular VGA monitor it works ok but the encoder chip can sample incorrect black level during hsync periods if they are not blanked entirely (it could explain the very dark background). I will check it and fix it.

[yaqube]

http://en.wikipedia.org/wiki/Bill_of_materials