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No-one is going to make one. It is not economically viable.
One of the parts of the Asynchronous 68000 bust transfer is the wait states that are added while waiting for /DTACK. /DTACK can be created by a counter that is activated by /AS which is active low Address Strobe. The clock counts for a number of cycles then applies /DTACK.What is also interesting is the circuits used to interface SDRAM. The address gets multiplexed by a counter to do the two sets of address reads, that is from the cpu to sdram. This is done after /AS and before /DTACK.