Motorola 68060 FPGA replacement module (idea)

[wawrzon]

Well I don't want to saw my case up for one thing... I'm not suggesting using PPC just pointing out that dual CPU has been made to work. I've never owned one, though, so I can't say how well it works.

i have one. i always refused one but got it beginning of this millenium, and can confirm that its nothing great. the best part is fast scsi controller. i can dispose of ppc, that can only be taken advantage of the specially precompiled code. all the usual (68k) stuff runs as usual on the 68k processor with its usual speed. so its just okay for what it should be.

Accelerators have an FPGA on board anyway to handle various bus signals, could just be a case of replacing it with a bigger one, and an interface to allow the firmware to be updated from software. FPGA accelerator basically works but there is a barrier to community development of the core(s). Plus people could create custom cores, which could produce some interesting projects. I'd like to develop my own core but I don't have the means to produce hardware.

Arm chip need not be expensive.

im sure its not just as simple as glueing another fpga to an existing design if there was one at disposal to start with. look how much effort has been put into minimig, fpgaarcade or natami hardware. there are several fpga aware people around the scene yet except those little else is available to us. lets do not underestimate the hardware development effort and try to keep it as simple as possible on this side. a hybrid board is under these circuumstanced surely not the best approach, except there is one already in development:
http://ultimateppc.nl/

[wawrzon]

Hardware would need a redesign but I'm sure it wouldn't be beyond anybody who has made an accelerator before.

but who do you know who has made an accelerator board before. to my knowledge there is only one (very professional) person yet in the community. jens schoenfeld of individual computers. and he refuses any complicated design and tries to keep things reasonably down to the earth. he didnt even made any 060 design up till now. let us stay realistic rather than pipe dreaming, especially if neither you nor me can contribute to the hardware development. to demand of others is easy.

But these all try to emulate a complete Amiga system.

im not sure if that is actually such a big difference. minimig can run with an associated asic 68k processor and with a softcore like tg68 withing fpga arcade and chameleon. so we have well encapuslated non aga chipset core at disposal and we can associate it with what we like to have for a 68k cpu solution. natami board was made much too complicated i think, just because there was so much features thomas or the followers wahted to implement. thinking of an accel we do not need chipset emu at all of course.

With big FPGA+small Arm+Flash ROM (flashable in software) development could be done in the community rather than in isolated groups, that's essentially my "crazy idea" anyway. The hardware could be configured various ways, 68k core in the FPGA, software 68k emulation on the Arm, potentially PPC in the FPGA as well I guess, or anything else you could think of. But could run AROS "out of the box" with nothing in the FPGA but a bus interface.

but this is completely another subject. the software side can be thone by the comunity anyway. but it is difficult to expect that hardware can be developed like that. therefore i think it is important to keep hardware side simple.

[wawrzon]

it was me who proposed x86 accel i admit, in order to simplify the design using widely awailable prefabricated components. if you look at jens schoenfeld x-surf, apparently one of the best zorro network cards, its an pc low profile isa card assembled with a simple zoro adapter board and a little logic. jens must have done the simplest and most reasonable thing there was.

also i did not propose to run native code on that accelerator, whatever cpu it would carry, except for 68k emu. everything else would run 68k native without any modifications. at least at the beginning. the rest could stay open. but lets leave this topic to better informed.

[wawrzon]

but I wouldn't go to much expense to put an x86 in my classic

even if it would make your amiga fastest original amiga ever, faster than x1k and a g5mac?

[wawrzon]

i wouldnt mind people not taking solutions as amiga enough. ppc isnt amiga as well. people will complain and then shut up and want have when they see the results. all that runs available and potentially possible 68k codebase but faster is fine whatever the tech behind it.

[wawrzon]

as for the purists, ive seen a notion that even hardcore os4 fans are now for immediate x86 switch when doable. dunno why the original amiga fans should bother more. those who dont care about speed can keep their 68ks..

[wawrzon]

then i would divide the approach in two parallel, as there are either suppoers for an asic cpu with fpga glue or pure fpga anyway. fpga may give us simpler purer solution, while arm or x86 will provide raw power. ok?

[wawrzon]

@Heiroglyph
+1 on all points
+ i think the approach to look from the 68k emulation perspective treating the amiga as expansion card providing interface to the original chipset and the original interfaces, is exactly right, since this is what it in fact is, even if you use your usual 68k accelerator today.
whats important is to provide yet some expansion possibility best not bound to amiga itself as for instance pci. who has fast cpu wants fast rtg as well.

[wawrzon]

I think if we've got some fast CPU running 68k emulation or otherwise, it would be a shame not to make its raw power available to the user in some way.

as is said i agree with heiroglyph on all points, especially on moldular construction and approach. see that jens schoenfeld is going exactly the same way now, providing unified interfaces for different computers and for different accelerators. perhaps it would even be possible to get him on boat, both adopting his interface standards, as advisor and as future manufacturer.
what concerns exposing the native cpu to the user, it might be done like on amithlon, as an option by a dedicated developer. that is the part of modular approach, we propose, that different concepts might coexist as long as there is enough interest there. btw why not invite bernd (umisef on aw.net) the amithlon coder as advisor too?

[wawrzon]

@ Heiroglyph

I'm concerned that USB (any flavour) will have too high a latency to be used for a CPU/Chipset bus,

im a noob, but likely..

here some thought interfacing via pci, seems doable, alas in german:
http://www.a1k.org/forum/showthread.php?t=35374&highlight=turbokarte&page=12

[wawrzon]

We've recently seen the Prometheus PCI open sourced so there is a ZorroIII to PCI interface that works and only needs 1-2 CPLDs. It could be even simpler since there aren't multiple PCI devices, it would be a target not a host and you wouldn't need to multiplex the address and data lines.

i would design it though treating amiga like one had mounted pci device on a bus among possible others, being a pci gfx card for instance. of course there is rather no need to have dma between amiga and pci gfx card, its enough to have it between host cpu boad and pci. on the other hand michael boehmer (e3b) has improved prometheus firmware to enable amiga-pci dma but this is closed source due to his agreement with prometheus designers.

on subject of openpci or alternative standards, i would propose to coordinate effort with aros68k maintainers. aros team has considered and rejected openpci as its standard for various reasons (license, free availability, documentation). it provides pci hidd based partly on netbsd so far i know and in parallel a prometheus.library.

[wawrzon]

I guess you guys have to decide if you want 100% compatibility or not.  If you do, you absolutely must have a cycle exact emulation.  There are quite a few programs that require it.  You could also deliberately set emulation thresholds.  For example, you could set the speed/emulation type to be Amiga 500 (68000), Amiga 3000 (16MHz or 25MHz 030), Amiga 4000 (25MHz 68040), etc.  This way you could run those euro demos in Amiga 500 mode that won't work on anything else.  

speaking from a user perspective the idea of an accelerator absolutely contradicts anything being cycle exact, am i right? so neither is an a1200 cycle exact to a500 nor an amiga with any accel to the same device as such. i think its self explanatory we have to sacrifice cycle exactness. and as an owner of practically only accelerated amigas id say, this is a very good deal.

[wawrzon]

I thought the PCI hidd was reasonably close to or based on OpenPCI? I seem to remember seeing headers from openpci in there a long time ago.

im not sure. i remember i proposed incorporating openpci and been opposed on the dev ml.
the rudimentary 68k implementation is mostly by jason mcmullan, it doesnt even work yet, but allows to identify details of the present boards, at least in my mediator.

at the point when it becomes an issue you might join dev ml:
https://www.hepe.com/mailman/listinfo/aros-dev/
 or i will provide you with the mail address.

[wawrzon]

I've recently seen PLX PCI9054 which converts 060 to PCI bus and don't need CPLD/FPGA...

ermmm.. what? where?

[wawrzon]

@wawrzon, Any application that has failed for you because of accelerators ?

none i remember or would seriously care for.

So I think PCI is doable but don't forget that translation between PCI and Zorro may introduce bottlenecks. But why introduce any bus at all between the CPU-in-FPGA and the CPU-socket? KISS..

i think we are talking to almost drop zorro or at least zorro3, and have a direct pci interface next to amiga being interfaced by pci as well. no zorro bottleneck between cpu and pci anymore. i understand the zorro pci interface would be used to interface the remaining amiga hardware or whats left of zorro bus.

[wawrzon]

why nobody?
http://www.powerphenix.com/ctpci/english/overview.htm

if the designs are open could be used as reference.